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202 commits

Author SHA1 Message Date
jaseg
be858b46e1 Add jupyterlab to requirements.txt 2026-01-25 00:01:19 +01:00
jaseg
25bcf88a5a Update README with more board info 2026-01-14 08:10:41 +01:00
jaseg
acaf8c228a Add ipympl notebook requirement 2026-01-14 08:09:47 +01:00
jaseg
e64105275b Add version numbers to requirements files 2026-01-14 08:06:57 +01:00
jaseg
170c946dbd Fix remaining runtime errors in jupyter notebooks 2026-01-13 19:16:42 +01:00
jaseg
38a9f701ba Add detailed requirements for notebooks and analysis scripts 2026-01-13 18:55:46 +01:00
jaseg
cd33cff0e8 Update scope pulse plots for thesis 2025-12-02 16:51:37 +01:00
jaseg
ac90764856 Add raw scope data 2025-12-02 16:20:27 +01:00
jaseg
27becd2f7d Add analysis of scope measurements 2025-11-20 18:49:00 +01:00
jaseg
269b2c749f Add LICENSE 2025-11-11 13:21:44 +01:00
jaseg
9f6fb67452 README: Describe data format better 2025-10-27 14:08:07 +01:00
jaseg
3a7a8cff27 README: Update with instructions for replication 2025-10-27 14:01:44 +01:00
jaseg
1b6cb65aed README: Fix schematics path 2025-10-27 13:45:48 +01:00
jaseg
feb17078ee README: Convert LaTeX in abstract to unicode 2025-10-27 13:44:33 +01:00
jaseg
d638d07551 Document jupyter notebooks for artifact release 2025-10-27 13:40:39 +01:00
jaseg
52bd2d788b README: Add blog link and header photo 2025-10-27 12:55:02 +01:00
jaseg
fdf8ecf2b7 Add README 2025-10-27 12:36:00 +01:00
jaseg
073cf90b33 Repo re-org for artifact submission 2025-10-27 12:34:55 +01:00
jaseg
ee67e7cb56 Add missing gerbers 2025-10-27 12:23:36 +01:00
jaseg
630e45ccaa Add fabrication exports 2025-10-27 12:19:09 +01:00
jaseg
e8ca9f3041 Typo fix 2025-10-21 14:13:01 +02:00
jaseg
b4dc58286d Fix URL formatting 2025-10-20 13:29:37 +02:00
jaseg
efdd649520 Fix repo URL 2025-10-03 00:08:43 +09:00
jaseg
1301071cc3 Add final camera ready export 2025-10-03 00:06:27 +09:00
jaseg
3377460791 Include Konrad's feedback 2025-09-30 17:59:04 +02:00
jaseg
4989092c72 Minor revision draft 2025-09-30 16:29:18 +02:00
jaseg
eed545ce12 Add missing citations 2025-09-30 15:48:20 +02:00
jaseg
68f198d893 adjust CER explanation 2025-09-29 21:58:55 +02:00
jaseg
43ab3f477b Update all CER values with ones derived from the distributions 2025-09-29 21:53:51 +02:00
jaseg
72d2fbc4e8 WIP 2025-09-29 14:25:24 +02:00
jaseg
5e3ac0a1a5 Minor revision WIP 2025-09-28 10:54:17 +02:00
jaseg
980ed536ab Update revision letter 2025-09-01 13:54:09 +02:00
jaseg
f3f2354c8b Revision letter draft 2025-08-30 16:01:12 +02:00
jaseg
7e1cd4f70f Add revision letter 2025-08-29 17:04:45 +02:00
jaseg
b4132f30bb majR: final changes 2025-07-16 12:57:33 +02:00
jaseg
da4d8de2c8 Change highlight color scheme to red/blue and add note to the title page 2025-07-15 23:21:22 +02:00
jaseg
830b8146dc Update source info 2025-07-15 23:14:56 +02:00
jaseg
2dd8b2d0c7 Color figure captions 2025-07-15 23:12:33 +02:00
jaseg
7c7c52cef0 majR WIP 2025-07-15 16:51:24 +02:00
jaseg
93ff02e20b majR WIP 2025-07-15 14:42:05 +02:00
jaseg
eed349f4a5 majR WIP 2025-07-14 21:25:13 +02:00
jaseg
3a287db5e4 Cut down a bunch of stuff, make space for majR measurements 2025-07-14 14:37:42 +02:00
jaseg
7642a0e3ee Add short within trace interleaved batch 2025-07-11 19:45:34 +02:00
jaseg
bfb5a2c74e Add short within trace interleaved batch 2025-07-11 19:07:45 +02:00
jaseg
ecba55f599 fw/web: Add trigger mode 2025-07-11 18:55:30 +02:00
jaseg
e19f5c4aba Lots of new plots 2025-07-11 16:57:25 +02:00
jaseg
b71ae3ca93 Add interleaved before/after patch batch 2025-07-11 15:22:15 +02:00
jaseg
7f90db0064 Add interleaved loop patch batch 2025-07-11 14:40:58 +02:00
jaseg
cf14ae1595 Add distinguish copies run plots 2025-07-11 13:18:31 +02:00
jaseg
122c8fd09e Add 25-07-11-01 interleave copy batch 2025-07-11 12:51:23 +02:00
jaseg
3524f994d7 Paper WIP 2025-07-10 17:15:38 +02:00
jaseg
e3dd78359f Improve larger covariance plots 2025-07-10 16:00:01 +02:00
jaseg
28f426fded Add triangle-delta classifier improvement, and large-scale plot 2025-07-10 11:46:17 +02:00
jaseg
2004cc49e7 Fiddle with plots 2025-07-09 20:52:58 +02:00
jaseg
bb422fbd9c Improve loop patch classifier performance by enabling smoothing 2025-07-09 20:49:59 +02:00
jaseg
e55c61b900 Add repeat loop patch run plots 2025-07-09 20:24:14 +02:00
jaseg
c274f578f1 Add repeat loop patch measurement batch 2025-07-09 19:39:37 +02:00
jaseg
fddbb117b6 Update all figures, include traces of calculated results 2025-07-09 17:59:12 +02:00
jaseg
19aa17fcb6 Add new measurements of loop patches using both drivers 2025-07-09 17:14:28 +02:00
jaseg
94472d278b Add forest setup pics 2025-07-09 16:44:51 +02:00
jaseg
c4be1e61ab Add anonymized gerber and PDF schematic exports 2025-07-09 16:38:41 +02:00
jaseg
504661e8d2 src/main.c: Add more comments 2025-07-09 16:30:54 +02:00
jaseg
73b644fd4a Add legend to CDF plots 2025-07-09 13:59:42 +02:00
jaseg
97f52eecc5 Fix CER/error rate calculation 2025-07-09 13:46:15 +02:00
jaseg
7bc2e2040d Add labels to environment plots 2025-07-09 13:39:58 +02:00
jaseg
f47d8b4813 Update forest interleave plot to only use batch size of 10 2025-07-09 13:24:30 +02:00
jaseg
837bec252d Add forest environment plots 2025-07-09 13:23:03 +02:00
jaseg
f6b54d472a Add forest environment batch 2025-07-09 13:14:48 +02:00
jaseg
a50eea4417 Add lots of new plots 2025-07-08 21:24:28 +02:00
jaseg
534c368c72 Add homeoffice environmental batch 2025-07-08 21:04:31 +02:00
jaseg
fb00c9a186 Add wire probe batch 2025-07-08 20:43:10 +02:00
jaseg
afa7748dcb Add soldering iron probe run 2025-07-08 20:29:57 +02:00
jaseg
e47a0ccd0c Add loop patch attack batch 2025-07-08 19:35:57 +02:00
jaseg
4f279be11a Update notebook 2025-07-08 19:35:22 +02:00
jaseg
0afc2ed80b Add 2025-07-08-01 environmental batch 2025-07-08 11:31:51 +02:00
jaseg
88a704f8cc Lots of new plots 2025-07-07 13:49:16 +02:00
jaseg
1b554eb74d Add 2025-07-07-01 attack batch 2025-07-07 13:27:32 +02:00
jaseg
b7c975553f Add publication-ready plots 2025-07-03 14:38:06 +02:00
jaseg
cddcbcd5ef Add tempco figures 2025-07-03 13:27:29 +02:00
jaseg
4bc5bc9f09 Fix bug leading to invalid cal measurements 2025-07-03 13:25:52 +02:00
jaseg
f93719cca8 Add long-term (~3h) drift measurement 2025-07-02 18:55:27 +02:00
jaseg
3225f85947 data: add more repeat measurements 2025-07-02 18:45:51 +02:00
jaseg
76b7fc3733 Add elevated temperature data 2025-07-02 17:16:18 +02:00
jaseg
a6e11dc6b9 data: add missing hot baselines 2025-07-02 17:07:18 +02:00
jaseg
9801bddfe4 data: add hot mesh batch 2025-07-02 17:02:44 +02:00
jaseg
5c2c8b3861 More data analysis 2025-07-02 16:51:52 +02:00
jaseg
cf98e81319 data: add 25-07-02-04 batch 2025-07-02 16:47:26 +02:00
jaseg
0e6b560af0 data: add interleaved probing batch 2025-07-02 16:22:56 +02:00
jaseg
246a6d1e6a More data analysis 2025-07-02 15:12:19 +02:00
jaseg
70f5f976cb Add multi trace viewer notebook 2025-07-02 15:11:59 +02:00
jaseg
bf8433e95e Add interleaved p0.3 measurements 2025-07-02 15:00:35 +02:00
jaseg
e5d9a27a6d Notebooks WIP 2025-07-02 14:29:08 +02:00
jaseg
cca3c06bd5 Work on baseline classifier 2025-07-02 13:15:28 +02:00
jaseg
ae481d1bfa data: add batch 25-07-02-01 2025-07-02 13:14:25 +02:00
jaseg
67877729be data: add 25-07-01-01 batch 2025-07-02 10:29:21 +02:00
jaseg
01a40c54c8 Disable auto-download for now 2025-07-02 10:28:12 +02:00
jaseg
f811a90571 Clean up live plot interface 2025-07-01 12:33:44 +02:00
jaseg
61976037b3 Record 2025-06-30 mods 2025-06-30 18:19:21 +02:00
jaseg
c5876c7d8c Add classifier notebook 2025-06-30 14:05:43 +02:00
jaseg
480855224b Add TDP0604 measurements 2025-06-27 17:28:31 +02:00
jaseg
063ce2859e Add specimen serial qr gen and first measurements 2025-06-27 17:04:10 +02:00
jaseg
e52ce70745 Try to re-focus the input field after scanning 2025-06-24 15:52:22 +02:00
jaseg
a893cd59b7 Add comments, fix sampling bug, add tdp0604 serial 2025-06-23 17:29:17 +02:00
jaseg
5ee847de66 Last wording fixes 2025-06-23 16:41:30 +02:00
jaseg
c75c48e53c Add new measurement recording infrastructure 2025-06-23 16:40:22 +02:00
jaseg
b8812245ec Add new mesh coupons 2025-06-17 15:00:58 +02:00
jaseg
6a88f43e08 Add classification/correlation calculations for rebuttal 2025-06-02 16:09:54 +02:00
jaseg
75aa5b978b Remove patenting mention 2025-04-17 16:53:20 +02:00
jaseg
358bf8da8c Add missing notebook 2025-04-15 19:42:43 +02:00
jaseg
07f722b82d Fix rise time plots 2025-04-15 19:42:10 +02:00
jaseg
116968cf5f Finish spell checking pass 2025-04-15 14:09:21 +02:00
jaseg
1b25f38d1b Spellcheck WIP 2025-04-15 11:59:29 +02:00
jaseg
30b9f11a50 Some spelling fixes 2025-04-14 12:51:53 +02:00
jaseg
97b34b7c31 Fix paper email 2025-04-14 12:49:04 +02:00
jaseg
3c404a4ac2 Multiple wording improvements 2025-04-14 12:46:53 +02:00
jaseg
498195159a Paper rework WIP 2025-04-11 17:06:16 +02:00
jaseg
833d9b25cc Paper WIP 2025-04-11 13:11:33 +02:00
jaseg
4204412129 Rework WIP 2025-04-11 11:50:45 +02:00
jaseg
be34e3da88 Add tobi's comments 2025-04-11 11:13:38 +02:00
jaseg
3be03152e7 Remove redundant macro 2025-04-10 20:34:08 +02:00
jaseg
1404342cfc Clean up duplicate fields in printed bibliography 2025-04-10 20:33:07 +02:00
jaseg
1b47007bf7 Fix up patent citations 2025-04-10 20:16:18 +02:00
jaseg
f2a7c8ec9f Update abstract 2025-04-10 16:04:32 +02:00
jaseg
9639ce2626 Fix some small stuff 2025-04-10 14:56:17 +02:00
jaseg
35cb34622a Small fixes 2025-04-09 19:58:39 +02:00
jaseg
60a5d8265a Add missing figure source files 2025-04-09 19:54:13 +02:00
jaseg
044c48867e Move some photos to the appendix 2025-04-09 19:53:47 +02:00
jaseg
05b0c4b577 Paper done, add one more attack 2025-04-09 19:48:50 +02:00
jaseg
a2cc02a99a Revert "Enable spectrum measurement mode"
This reverts commit f335d96c4f.
2025-04-09 17:32:45 +02:00
jaseg
8a9767f1b7 Paper WIP 2025-04-09 14:22:19 +02:00
jaseg
29bf0ab973 Proof work 2025-04-09 12:36:04 +02:00
jaseg
c6538f4262 Remove git repo URL 2025-04-08 21:40:31 +02:00
jaseg
c792bdf49d Review pass mostly done, first half primarily 2025-04-08 21:38:32 +02:00
jaseg
b4021b0eb6 Rework WIP 2025-04-08 21:26:16 +02:00
jaseg
b92610db63 Add block diagram pdf export 2025-04-08 19:52:05 +02:00
jaseg
7db8382461 Revert "Try out ACM style"
This reverts commit a66f6a878f.
2025-04-08 14:22:25 +02:00
jaseg
5cd0c3ec76 Block diagram WIP 2025-04-08 14:21:53 +02:00
jaseg
454c0dd764 Add block diagram draft 2025-04-08 14:00:47 +02:00
jaseg
a66f6a878f Try out ACM style 2025-04-07 17:05:55 +02:00
jaseg
42228a7052 A lot more text 2025-04-07 16:49:32 +02:00
jaseg
4e03dc89cc Update risetime notebook 2025-04-05 14:19:02 +02:00
jaseg
164647cd7a Fix risetime calculation 2025-04-05 14:18:02 +02:00
jaseg
bd5ddf7dbb Make risetime numbers comparable by using consistent thresholds 2025-04-05 14:07:47 +02:00
jaseg
849532722f Paper: improve structure 2025-04-04 21:37:28 +02:00
jaseg
dc8c46ff7b More related work 2025-04-04 19:17:24 +02:00
jaseg
f5fddd4a2f Add more sources 2025-04-04 18:20:39 +02:00
jaseg
ea1ae3bed1 paper: Add more pictures 2025-04-04 15:36:37 +02:00
jaseg
82380fe639 Update paper 2025-04-04 12:01:27 +02:00
jaseg
9e20abf2d8 Add spectrum plots, looking good! 2025-04-03 17:58:11 +02:00
jaseg
df2dea59d6 Add missing spectrum data 2025-04-03 17:07:57 +02:00
jaseg
20446874b6 Update spectral analysis, increase test fw gen frequency 2025-04-03 17:06:55 +02:00
jaseg
95a68e62bd Update trace plot alignment 2025-04-03 17:04:35 +02:00
jaseg
b5f685e308 Add new spectrum measurements 2025-04-03 11:16:11 +02:00
jaseg
7dd66b86b3 Fix legends not showing up in some plots 2025-04-02 19:58:30 +02:00
jaseg
f335d96c4f Enable spectrum measurement mode
Revert "Undo temporary spectrum measurement changes"

This reverts commit a2d95a324a.
2025-04-02 19:52:57 +02:00
jaseg
5e45553d5a Add speed of light calculation 2025-04-02 19:04:37 +02:00
jaseg
d11dd4c9ba Run exports 2025-04-02 17:47:13 +02:00
jaseg
2974c6f250 Add mesh length calculation and visualization tool 2025-04-02 17:46:46 +02:00
jaseg
e8e0b976e6 Fix javascript data corruption issue and re-do manipulation measurements 2025-04-02 17:41:12 +02:00
jaseg
e25522b24e Add new manipulation experiments 2025-04-02 16:37:35 +02:00
jaseg
41befda8ee Fix 74LVC length plot offset 2025-04-02 14:20:40 +02:00
jaseg
1aa8b035ac Re-do length measurements with cliplines 2025-04-02 14:16:21 +02:00
jaseg
bb5d784299 Paper WIP 2025-03-31 18:26:44 +02:00
jaseg
e78319c20f Paper WIP 2025-03-31 16:58:56 +02:00
jaseg
f87fc2668b Update probe plot 2025-03-31 14:47:20 +02:00
jaseg
35f3b70249 Improve probe shape plots 2025-03-31 14:47:20 +02:00
jaseg
4603e55dc1 Paper WIP 2025-03-31 14:19:24 +02:00
jaseg
b120545558 Add more plots 2025-03-28 18:37:56 +01:00
jaseg
0b0ae3691a Update paper 2025-03-28 15:37:19 +01:00
jaseg
34749fbeaf Update risetime plots with thresholds 2025-03-28 12:53:22 +01:00
jaseg
c583a88e82 Add exported risetime graph 2025-03-28 12:49:10 +01:00
jaseg
059f1d9348 Improve plots 2025-03-27 19:56:53 +01:00
jaseg
503d224234 Add risetime notebook 2025-03-27 19:09:02 +01:00
jaseg
98a5629e7e Add repeated measurements for broken board and for risetime tuning 2025-03-27 19:08:41 +01:00
jaseg
7c9ab078b2 Add capture data for all chips except ONET 2025-03-27 17:52:58 +01:00
jaseg
919d018641 Fix build 2025-03-11 20:07:25 +01:00
jaseg
a8e9e325f7 Paper WIP 2025-03-11 20:06:43 +01:00
jaseg
f27afeecbb paper: Text on mesh related work and circuit design 2025-03-10 20:41:34 +01:00
jaseg
d0bab63ec0 Paper WIP 2025-03-10 17:37:34 +01:00
jaseg
2703e67004 fw: Fix aliasing issue, improve web IF 2025-02-07 18:18:07 +01:00
jaseg
d5ab91648d Update fw/interface to add variance data 2025-02-07 12:56:00 +01:00
jaseg
a2d95a324a Undo temporary spectrum measurement changes 2025-02-07 11:45:06 +01:00
jaseg
3f9a52e1b0 Add second risetime calculation 2025-01-29 16:28:07 +01:00
jaseg
b4aa5db722 Finished preliminary bandwidth analysis. 2025-01-29 16:20:51 +01:00
jaseg
fef6b17aed Initial analysis of measurements 2025-01-29 12:47:42 +01:00
jaseg
15cd939e9c Add spectrum measurement results 2025-01-29 11:50:21 +01:00
jaseg
0805760010 Add input clamping diodes 2025-01-28 15:37:13 +01:00
jaseg
3c54e54e5c Paper WIP 2025-01-15 09:54:42 +01:00
jaseg
992b4dc434 Paper WIP 2024-12-14 22:19:57 +01:00
jaseg
e09904ce16 Add paper scaffold 2024-12-11 18:01:54 +01:00
jaseg
aa4839aed3 Make oversampling configurable 2024-12-02 16:39:55 +01:00
jaseg
65a626f6c8 Properly tuned double-edge sampling 2024-12-02 14:20:58 +01:00
jaseg
440922f10c re-enable oversampling 2024-11-26 17:20:42 +01:00
jaseg
e2a074c114 It's roughly doing what it's supposed to do now.
We have mystery oscillations.
2024-11-26 16:45:11 +01:00
jaseg
78a0e8ae31 WIP 2024-11-26 16:34:37 +01:00
jaseg
c229fbdde8 make sampling phase and width remotely configurable 2024-11-25 21:31:42 +01:00
jaseg
3fce64ae3e Extend remote control both ways 2024-11-25 20:56:27 +01:00
jaseg
7fb1311a85 Something weird is happening with the hrtim master period
This new value gives much cleaner curves. I suspect that either we have
some issue with ADC sampling not being precise due to clock domain
crossings, or this is just interference and the new period hits a sweet
spot that is coherent with this interference.
2024-11-23 15:21:34 +01:00
jaseg
1f37d9221b Decrease oversampling to increase update rate 2024-11-23 14:29:55 +01:00
jaseg
b32c4d9d61 Move stimulus instead of sampling pulse, eliminates ADC alignment issue
The ADC can only trigger on whole clock pulses, so when we move the
sampling pulse in fractional increments, the relative alignment of the
ADC's sampling phase w.r.t. sampling pulse moves around +/-0.5 clock
periods. Since our opamps ring a bit, that leads to an artifact in the
measurements with a period of 32 samples (one whole clock pulse). Moving
the stimulus pulse instead fixes this issue, as now the alignment
between the sampling pulse and the ADC's sampling is constant.
2024-11-23 14:24:09 +01:00
jaseg
54ccc277c2 Add todos to board schematic 2024-11-23 13:59:24 +01:00
jaseg
e28c6e37e5 I2C wasn't working, with pin-strapped driver config we now get some *very* spicy edges it seems
This commit also scales the web UI plots' X axis in ns and Y axis in V.
2024-11-22 17:29:05 +01:00
770 changed files with 842660 additions and 6903 deletions

1
.gitignore vendored
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@ -6,3 +6,4 @@ fab
venv
gerber
gerber.zip
.ipynb_checkpoints

4
.gitmodules vendored
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@ -1,7 +1,7 @@
[submodule "fw/upstream/PyCortexMDebug"]
path = fw/upstream/PyCortexMDebug
path = firmware/upstream/PyCortexMDebug
url = https://github.com/bnahill/PyCortexMDebug
[submodule "fw/upstream/stm32square"]
path = fw/upstream/stm32square
path = firmware/upstream/stm32square
url = https://gitlab.com/neinseg/stm32square
branch = release

170
LICENSE.txt Normal file
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@ -0,0 +1,170 @@
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High Fidelity Security Mesh Monitoring using Low-Cost, Embedded Time Domain Reflectometry
=========================================================================================
This repository contains all sources for our paper "High Fidelity Security Mesh Monitoring using Low-Cost, Embedded Time
Domain Reflectometry" to be published in CHES 2026/1 (`preprint on eprint <https://eprint.iacr.org/2025/1962>`__). You
can find a brief overview of the project `on Jan's blog <https://jaseg.de/blog/paper-sampling-mesh-monitor/>`__.
The canonical hosting location for this repo is https://git.jaseg.de/sampling-mesh-monitor.git . For comments or
questions, please reach out to Jan via `email <mailto:research@jaseg.de>`__ or `on mastodon
<https://chaos.social/@jaseg>`__.
.. figure:: paper/pic_board_setup_2_small.jpg
:align: center
:width: 400px
:alt: A PCB with several chips sitting on a table with another PCB with only traces on it plugged in through a
board-edge connector. The first PCB looks not very complex.
The final setup. On the right is the measurement board, and on the left is the mesh test specimen plugged in. In a
real application, you would integrate both into your target circuit.
Paper abstract
--------------
Security Meshes are patterns of sensing traces covering an area that are used in Hardware Security Modules (HSMs)
and other systems to detect attempts to physically intrude into the device's protective shell. State-of-the-art
solutions manufacture meshes in bespoke processes from carefully chosen materials, which is expensive and makes
replication challenging. Additionally, state-of-the-art monitoring circuits sacrifice either monitoring precision or
cost efficiency. In this paper, we present an embeddable security mesh monitoring circuit constructed from low-cost,
standard components that utilizes Time Domain Reflectometry (TDR) to create a unique fingerprint of a mesh. Our
approach is both low-cost and precise, and enables the use of inexpensive standard Printed Circuit Boards (PCBs) as
security mesh material. We demonstrate a working prototype of our TDR circuit costing less than 10 € in components
that achieves both time resolution and rise time better than 200 ps—a 25 × improvement over previous work. We
demonstrate a simple classifier that detects several types of advanced attacks such as probing using an oscilloscope
probe or micro-soldering attacks with no false negatives.
Repo structure
--------------
``main_pcb``
KiCad design files, exports and manufacturing files for the main circuit board. This board contains the measurement
circuit, and has a connector for test coupons to be inserted. Data is read out throught the SWD interface using an
SWD adapter. The board is a 6-layer PCB. The circuit is described in detail in the paper. It is based around a
``STM32G474RE`` ARM microcontroller.
``test_coupons``
KiCad design files, exports and manufacturing files for the test coupon PCBs. The coupons are four-layer boards.
Each coupon contains four test meshes, two on each side, that can be connected through four SFP form factor board
edge connectors at the coupon's corners.
``firmware``
Source code for the board firmware as well as tooling for running the experiments. The firmware is written in C, and
you'll need a standard ARM GCC/binutils toolchain to build it. The experiment tool is a python script that connects
to the board through GDB and exposes a local web server for controlling the board, monitoring the measurements in
real time, and capturing data.
``analysis``
All raw data, as well as the Jupyter notebooks used for analysis and plotting. By running these notebooks, you can
re-run the analysis, and re-export all plots in the paper. The raw data is contained in JSON files, one per
measurement series. Each JSON file contains some metadata describing the experiment and the settings used during the
experiment, a set of calibration runs with the target specimen disconnected using the board's routing switches, and
a full set of 12 measurement arrays consisting of a mean and standard deviation for each data point. To save space,
batches of these JSON files are aggregated into zip archives. The analysis Jupyter notebooks will automatically load
and decode the data from these zip archives when run.
``paper``
The source of the paper, as well as exports of all plots.
Running the analysis
--------------------
To re-run the analysis, first install `Jupyter Lab <https://jupyter.org/>`__ and the `numpy <https://numpy.org/>`__ and
`scipy <https://scipy.org/>`__ python packages. If you're running in a virtualenv or on a weird platform like Windows or
MacOS, make sure that jupyter and pip agree where your python lives and the packages get installed in the right place.
Afterwards, just run ``jupyter lab`` in the ``analysis/jupyter_notebooks`` directory. You can then open any of the
notebooks through the left side panel and re-run the analysis within. Make sure you run all of the setup code at the top
of the notebook once before trying to run the analaysis code in the cells below. The analysis code only uses standard
scientific python packages that you probably already have installed. If you get an ``ImportError``, make sure the
packages listed in the file ``analysis/jupyter_notebooks/requirements.txt`` are installed.
The notebooks will display the plots and results inside Jupyter Lab and will also automatically export the plots to the
``paper`` directory of your clone of the git repository.
PCB Designs
-----------
This repo includes both the raw CAD files of the PCBs, as well as exported manufacturing data for easier viewing if you
don't have KiCad installed. The schematics are included as PDF exports.
The PCB designs were prepared in the open source KiCad_ EDA tool. Note that for some files you might need to download a
KiCad nightly build depending on how new your KiCad version is.
PCB design folder structure
...........................
``foobar.{kicad_pro,kicad_sch,kicad_pcb,etc.}``
The KiCad source files of the PCB. Open the ``.kicad_pro`` file in KiCad, then you can open the schematics and board
layout from there.
``fab/gerbers.zip``
Gerber exports of the board layouts. You can open these in any Gerber viewer such as gerbv_. These files are
essentially vector graphics exports of the board layout. They show what copper, silkscreen etc. you see on the
board, but they don't include any semantic information such as component values. You can send this zip directly to a
PCB manufacturer and they will be able to manufacture these boards for you. The order parameters are included in the
gerber files on the ``User.Comments`` layer.
``fab/{bom.csv,pos.csv}``
Bill of materials and component placement coordinate files for board manufacturing. If you want a contract
manufacturer to solder these boards for you, you need to give them these two files in addition to the gerbers. The
BOM tells them what exact parts and how many of them you need, the position file tells them where to put them on the
board. We had JLCPCB make the PCBs, and we also had them solder most of the parts. Some parts we soldered after the
fact by hand because JLC didn't have them in stock, and getting them to order and solder them for us would have been
pretty expensive.
If you want to solder the main PCB yourself, you need some prior experience in fine SMD work and a decently setup
electronics lab with a microscope, a hot air reworks station, etc.
Note: **The PCB revision here does not have a functional driver IC!** For our lab experiments we microsoldered
the four different driver ICs by hand to avoid having to spin multiple copies of this expensive PCB. For some basic
measurements, you can just omit the driver IC included in the design and bridge it. This will drive the mesh
directly from the ``74LVC2G157`` gates, which is enough for some basic measurements.
``schematics/*.pdf``
PDF export of the schematics of the board.
Firmware
--------
The firmware and associated scripts are contained in the ``firmware`` directory.
Building the firmware
.....................
If you have an ARM GCC toolchain installed, you can build the firmware by running ``make`` in this directory. During
build, the makefile exports some diagnostic information about the build artifacts. For that to work, you have to have
the `cxxfilt python package <https://pypi.org/project/cxxfilt/>`__ installed. If the package can't be found, the
firmware will still be built, but you will get a crash in the makefile during the analysis step that runs after the
build was successful.
Running experiments
...................
To run an experiment, you need a measurement board and a test coupon. You also need the following software installed on
your machine:
* ``openocd``
* ``arm-none-eabi-gdb`` (another ABI arm gdb should work too)
* The python packages listed in ``firmware/requirements.txt``
To build the firmware, you additionally need a ARM toolchain installed. By default, the makefile assumes gcc/gnu
binutils, but you can override that if you prefer to use LLVM.
To run an experiment, connect the board to power via USB, and to your computer through an SWD debug adapter. We used
cheap STLinkV2 clones, if you have a different adapter you'll have to modify the ``.gdbinit`` script accordingly. After
connecting the board, open three terminal windows running the following three commands one per window, in this order.
1. ``openocd -f openocd.cfg``
2. ``arm-none-eabi-gdb build/main.elf``
3. ``python adc_serve.py``
This will connect to the board and start the realtime control and measurement web interface. You can open the web
interface at the location printed by ``adc_serve.py`` on startup.
If you're cheap like us and use a STLinkV2 clone SWD adapter, it may be that openocd takes a few (maybe up to five or
so) attempts to start up and connect to the microcontroller. After starting, the GDB terminal should start printing a
few lines of output every 30 seconds or so when it saves a measurement series. If GDB starts to hang, it might be that
you bumped a cable or accidentially shorted something on the board. To re-start, you first kill gdb (Ctrl+C, then
Ctrl+D, then Ctrl+D again), then you stop openocd (Ctrl+C, kill it if it doesn't stop in a few seconds), then you
restart them in the order above. You don't have to restart the web interface, just adjust any of the knobs to overwrite
the default control settings again.
Firmware Folder Structure
.........................
``src/main.c``
The source code of the mainboard firmware. This firmware captures data into internal buffers, which are read out
from the host through SWD.
``openocd.cfg``
OpenOCD script for connecting to the debug adapter. We used cheap STLinkV2 clones from aliexpress. If you use a
different debug adapter, you will have to modify this file accordingly to tell OpenOCD how to connect to the board.
The port numbers given here and in the ``.gdbinit`` must match up.
``.gdbinit``
GDB script running the data extraction. This script will continuously dump the measurement data into ``/tmp`` every
time a measurement series has been completed. Note that this file will be hidden on unixes. Also note that you will
have to explicitly allowlist this file's absolute path on your computer in your ``$HOME/.gdbinit`` the first time
you run it because gdb refuses to run unknown ``.gdbinit`` files for security.
``adc_serve.py``
Real-time monitoring and data capture tool. Before running this, first make sure you have gdb attached to the board
using the ``.gdbinit``. The tool communicates with the gdb script through files in ``/tmp``. It exposes a web
interface that displays the captured data in real time, allows you to change the board's measurement settings, and
allows you to export measurement series.
``make_barcodes.py``
This is a helper script we used to create barcode labels for all ~120 test specimens to simplify the measurement
workflow. We had a barcode reader hooked up to the computer running the measurements, so you could just scan a
specimen's barcode to capture a data series registered to that board in the web interface.
other files:
Build files for the firmware. These are mostly generic to this type of microcontroller and are included here so the
firmware source is self-contained.
.. _KiCad: https://www.kicad.org/
.. _gerbv: https://gerbv.github.io/

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