Fix build

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jaseg 2025-03-11 20:07:25 +01:00
parent a8e9e325f7
commit 919d018641

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@ -191,8 +191,8 @@ http://www.redrok.com/sampscope.htm -> ULB}, published in \todo{year}, which pre
extend the capabilities of then affordable $\approx\qty{10}{\mega\hertz}$ oscilloscopes to a bandwidth of
\qty{1}{\giga\hertz}.
Going along similar principles, \todo{cite https://github.com/MR-DOS/TDR_diploma_thesis/tree/master} presents a design
for a minimal sampling TDR circuit that uses a CMOS clock generator IC along with a CML fanout buffer for pulse
Going along similar principles, \todo{cite \url{https://github.com/MR-DOS/TDR_diploma_thesis/tree/master}} presents a
design for a minimal sampling TDR circuit that uses a CMOS clock generator IC along with a CML fanout buffer for pulse
generation. The circuit uses the same double sampling topology also used by \todo{cite previous source, magazine
article} to reconstruct a downsampled copy of the input signal in the analog domain before digitization.