jaseg
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ebd4feee2c
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driver/fw: Add missing startup and system file
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2019-03-05 00:22:27 +09:00 |
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jaseg
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dac83b15ed
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driver/fw: timer-based tx ported
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2019-03-05 00:21:21 +09:00 |
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jaseg
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dc040a71cc
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driver/fw: Handle blink from systick
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2019-03-05 00:09:32 +09:00 |
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jaseg
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d48b92b935
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driver/fw: Beginnings of a firmware
This code starts up and blinks a led. This means RCC, GPIO and SPI1 are working.
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2019-03-04 23:16:42 +09:00 |
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jaseg
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ca0439cb8e
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driver: add export w/ artwork
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2019-02-02 13:26:39 +09:00 |
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jaseg
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718e6158a5
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center: fix tape footprint polarity, vcc short, silk
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2019-02-02 13:25:40 +09:00 |
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jaseg
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c92f085509
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driver: fix a few misplaced vias, set grid origin, fix bottom mask
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2019-02-02 10:43:34 +09:00 |
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jaseg
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66e2a4b74d
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driver: Prettify heatsink mounting holes a bit
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2019-01-31 15:42:31 +09:00 |
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jaseg
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ff1a5b5085
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driver: Add board revision, fix up mask
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2019-01-31 11:11:15 +09:00 |
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jaseg
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a5e2087555
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driver: Add mounting holes for heatsink
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2019-01-31 10:55:07 +09:00 |
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jaseg
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7fafbc6451
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driver: Move traces away from board edge
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2019-01-31 09:46:31 +09:00 |
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jaseg
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cf600ee4c1
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Small adjustments, fix silk
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2019-01-31 09:41:51 +09:00 |
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jaseg
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2171abab6f
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Throw out a bunch, use a different microcontroller
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2019-01-30 13:10:33 +09:00 |
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jaseg
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f35fa09a03
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Fix lcd connector position
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2019-01-30 10:00:05 +09:00 |
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jaseg
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07f1d44f73
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driver: Add mounting holes for RS485 adapter
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2019-01-29 20:22:37 +09:00 |
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jaseg
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cbbe054fc7
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Modify temp sensor to MSOP fp, add fan conn
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2019-01-29 14:36:21 +09:00 |
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jaseg
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6378f9b08c
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Fix R1 footprint
0603 -> 1206
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2019-01-23 12:25:54 +09:00 |
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jaseg
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128ad7271c
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Fix up a couple of dimensions
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2019-01-20 00:00:22 +09:00 |
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jaseg
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c843304ba3
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driver: Fatten a few power traces
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2019-01-19 14:27:30 +09:00 |
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jaseg
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ff263fbfae
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driver: Fixup SWD header, swap driver outputs for VSW split, finish silk
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2019-01-19 14:21:02 +09:00 |
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jaseg
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f6fb82f3c8
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driver: initial DRC done
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2019-01-18 22:46:36 +09:00 |
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jaseg
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7a59402d00
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driver: Finish initial routing
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2019-01-18 22:41:02 +09:00 |
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jaseg
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6c18301850
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driver: Initial layout almost done
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2019-01-18 01:21:21 +09:00 |
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jaseg
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0a1148cbec
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driver: Continue layout
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2019-01-17 19:31:00 +09:00 |
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jaseg
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cb0f82cc4f
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driver: Initial layout
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2019-01-17 14:28:38 +09:00 |
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jaseg
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cdde2177e1
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Driver schematic progress
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2019-01-15 20:24:03 +09:00 |
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jaseg
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57dcea3ede
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Fix double edge issue with driver
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2019-01-15 15:01:23 +09:00 |
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jaseg
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f564294fd2
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Add initial driver schematic draft
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2019-01-15 15:01:11 +09:00 |
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jaseg
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0f206f09bf
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TIM3 working stably now
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2019-01-13 15:34:01 +09:00 |
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jaseg
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7b5ca8102b
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Basic timer-based blanking working
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2019-01-13 01:35:03 +09:00 |
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jaseg
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6006b360d1
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Make protocol unit tester count test cases
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2019-01-12 22:47:05 +09:00 |
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jaseg
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7461b22bfa
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Protocol unit test working
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2019-01-12 22:44:25 +09:00 |
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jaseg
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2d392fe60a
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bulk cmd test works
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2019-01-12 22:38:23 +09:00 |
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jaseg
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43f64f0e1f
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Split receiver into logical parts
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2019-01-12 12:54:29 +09:00 |
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jaseg
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c6547c6e6f
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Basic command comm works
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2019-01-11 22:02:14 +09:00 |
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jaseg
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528d653bde
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Decoding and comma triggering works
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2019-01-10 14:31:20 +09:00 |
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jaseg
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0161d6665c
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Debug scope works nicely
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2019-01-10 13:35:15 +09:00 |
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jaseg
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5da6e46739
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Fix up scope mode
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2019-01-09 22:57:11 +09:00 |
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jaseg
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d3edf27c89
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Initial detector logic draft
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2018-12-24 20:24:53 +09:00 |
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jaseg
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c339384cbe
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Pimp ADC measurements with voltage means
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2018-12-24 19:55:28 +09:00 |
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jaseg
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f5d7b0428d
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Add untested ADC mode switching code
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2018-12-24 19:09:46 +09:00 |
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jaseg
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0029ed768e
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Make center ADC work in "scope mode"
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2018-12-24 18:08:01 +09:00 |
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jaseg
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62389e00fe
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ADC working
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2018-12-23 12:57:40 +09:00 |
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jaseg
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468fe59d97
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First AC/mux test working
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2018-12-22 14:38:07 +09:00 |
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jaseg
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132fd4f9c0
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8b10b encoder and decoder working
Tested on all 24-bit inputs after sync and on ~500M of random input
with and without intermediate sync
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2018-12-20 22:42:17 +09:00 |
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jaseg
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90038f4378
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Add initial center firmware
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2018-12-20 18:54:41 +09:00 |
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jaseg
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111b7a6bf3
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center: Add BOM
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2018-11-27 17:15:13 +09:00 |
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jaseg
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ad292924fc
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Make geber zip filenames more descriptive
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2018-11-27 11:03:05 +09:00 |
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jaseg
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6af42b0c5a
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Add corner gerber exports
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2018-11-27 11:01:29 +09:00 |
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jaseg
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d699a6cb30
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Add center artwork
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2018-11-27 10:54:33 +09:00 |
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