Initial commit

This commit is contained in:
jaseg 2019-10-28 15:03:24 +01:00
commit 81979f6646
21 changed files with 43711 additions and 0 deletions

24
bom.csv Normal file
View file

@ -0,0 +1,24 @@
Reference, Quantity, Value, Footprint, Datasheet, Reichelt
C1 C8 C16 C10 C3 C14 C9 C6 ,8,"100n","Capacitor_SMD:C_0603_1608Metric","~","X7R-G0603 100N"
C12 C11 ,2,"DNP","Capacitor_SMD:C_0603_1608Metric","~","NPO-G0603 22P"
C13 C7 ,2,"10n","Capacitor_SMD:C_0603_1608Metric","~","X7R-G0603 10N"
C2 ,1,"100u","Capacitor_SMD:CP_Elec_8x6.2","~","HD-V 100U 10"
C4 ,1,"10u","Capacitor_SMD:C_0805_2012Metric","~","X5R-G0805 10/16"
C5 C15 ,2,"1u","Capacitor_SMD:C_0603_1608Metric","~","X7R-G0603 1,0/16"
D1 ,1,"pink","LED_SMD:LED_PLCC_2835","~","SLO SMD-NPLCC-0"
D2 ,1,"cyan","LED_SMD:LED_PLCC_2835","~","EVL 67-21/RSC-F"
E1 ,1,"36pol. Stiftleiste, gewinkelt, RM 2,54","","","SL 1X36W 2,54"
E2 ,1,"Socket only, order module separately!","",""
J1 J3 J5 J6 ,4,"USB_A","Connector_USB:USB_A_Stewart_SS-52100-001_Horizontal"," ~","USB AW"
J2 ,1,"USB_B_Micro","Connector_USB:USB_Micro-B_Wuerth_629105150521_CircularHoles","~","MIC USB BBU"
J4 ,1,"SWD","Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical","~","RND 205-00625"
Q1 Q2 Q3 Q4 ,4,"IRLML6402","Package_TO_SOT_SMD:SOT-23","https://www.infineon.com/dgdl/irlml6402pbf.pdf?fileId=5546d462533600a401535668d5c2263c","IRLML 6402"
R1 R2 R9 R4 ,4,"100k","Resistor_SMD:R_0603_1608Metric","~","SMD-0603 100K"
R3 R5 ,2,"0","Resistor_SMD:R_0603_1608Metric","~","SMD-0603 0"
R6 ,1,"10K","Resistor_SMD:R_0603_1608Metric","~","SMD-0603 10K"
R7 R8 ,2,"1k5","Resistor_SMD:R_0603_1608Metric","~","SMD-0603 1,5K"
SW1 ,1,"on_off","Button_Switch_THT:SW_PUSH_6mm","","TASTER 9302"
U1 ,1,"AMS1117-3.3","Package_TO_SOT_SMD:SOT-223-3_TabPin2","http://www.advanced-monolithic.com/pdf/ds1117.pdf","NCP 1117 ST33T3G"
U2 ,1,"NRF24L01_Breakout","RF_Module:nRF24L01_Breakout","http://www.nordicsemi.com/eng/content/download/2730/34105/file/nRF24L01_Product_Specification_v2_0.pdf","RND 205-00653"
U3 ,1,"STM32F030F4Px","Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm","http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00088500.pdf","STM 32F030F4P6"
Y1 ,1,"DNP","Crystal:Crystal_SMD_HC49-SD","~","8,0000-HC49-SMD"
Can't render this file because it has a wrong number of fields in line 11.

23
bom_reichelt.csv Normal file
View file

@ -0,0 +1,23 @@
X7R-G0603 100N;8
NPO-G0603 22P;2
X7R-G0603 10N;2
HD-V 100U 10;1
X5R-G0805 10/16;1
X7R-G0603 1,0/16;2
SLO SMD-NPLCC-0;1
EVL 67-21/RSC-F;1
SL 1X36W 2,54;1
;1
USB AW;4
MIC USB BBU;1
RND 205-00625;1
IRLML 6402;4
SMD-0603 100K;4
SMD-0603 0;2
SMD-0603 10K;1
SMD-0603 1,5K;2
TASTER 9302;1
NCP 1117 ST33T3G;1
RND 205-00653;1
STM 32F030F4P6;1
8,0000-HC49-SMD;1
1 X7R-G0603 100N 8
2 NPO-G0603 22P 2
3 X7R-G0603 10N 2
4 HD-V 100U 10 1
5 X5R-G0805 10/16 1
6 X7R-G0603 1,0/16 2
7 SLO SMD-NPLCC-0 1
8 EVL 67-21/RSC-F 1
9 SL 1X36W 2,54 1
10 1
11 USB AW 4
12 MIC USB BBU 1
13 RND 205-00625 1
14 IRLML 6402 4
15 SMD-0603 100K 4
16 SMD-0603 0 2
17 SMD-0603 10K 1
18 SMD-0603 1,5K 2
19 TASTER 9302 1
20 NCP 1117 ST33T3G 1
21 RND 205-00653 1
22 STM 32F030F4P6 1
23 8,0000-HC49-SMD 1

1254
fp-info-cache Normal file

File diff suppressed because it is too large Load diff

5101
gerber/remote-B_Cu.gbr Normal file

File diff suppressed because it is too large Load diff

5842
gerber/remote-B_Mask.gbr Normal file

File diff suppressed because it is too large Load diff

14
gerber/remote-B_Paste.gbr Normal file
View file

@ -0,0 +1,14 @@
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.99.0-52-gefbc802f4)*
G04 #@! TF.CreationDate,2019-10-28T15:02:11+01:00*
G04 #@! TF.ProjectId,remote,72656d6f-7465-42e6-9b69-6361645f7063,rev?*
G04 #@! TF.SameCoordinates,Original*
G04 #@! TF.FileFunction,Paste,Bot*
G04 #@! TF.FilePolarity,Positive*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.99.0-52-gefbc802f4)) date 2019-10-28 15:02:11*
%MOMM*%
%LPD*%
G04 APERTURE LIST*
G04 APERTURE END LIST*
M02*

14
gerber/remote-B_SilkS.gbr Normal file
View file

@ -0,0 +1,14 @@
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.99.0-52-gefbc802f4)*
G04 #@! TF.CreationDate,2019-10-28T15:02:12+01:00*
G04 #@! TF.ProjectId,remote,72656d6f-7465-42e6-9b69-6361645f7063,rev?*
G04 #@! TF.SameCoordinates,Original*
G04 #@! TF.FileFunction,Legend,Bot*
G04 #@! TF.FilePolarity,Positive*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.99.0-52-gefbc802f4)) date 2019-10-28 15:02:12*
%MOMM*%
%LPD*%
G04 APERTURE LIST*
G04 APERTURE END LIST*
M02*

View file

@ -0,0 +1,25 @@
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.99.0-52-gefbc802f4)*
G04 #@! TF.CreationDate,2019-10-28T15:02:13+01:00*
G04 #@! TF.ProjectId,remote,72656d6f-7465-42e6-9b69-6361645f7063,rev?*
G04 #@! TF.SameCoordinates,Original*
G04 #@! TF.FileFunction,Profile,NP*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.99.0-52-gefbc802f4)) date 2019-10-28 15:02:13*
%MOMM*%
%LPD*%
G04 APERTURE LIST*
%ADD10C,0.050000*%
G04 APERTURE END LIST*
D10*
X151250000Y-165500000D02*
X151250000Y-119250000D01*
X201250000Y-165500000D02*
X151250000Y-165500000D01*
X201250000Y-72500000D02*
X201250000Y-165500000D01*
X151250000Y-72500000D02*
X201250000Y-72500000D01*
X151250000Y-119250000D02*
X151250000Y-72500000D01*
M02*

8389
gerber/remote-F_Cu.gbr Normal file

File diff suppressed because it is too large Load diff

11251
gerber/remote-F_Mask.gbr Normal file

File diff suppressed because it is too large Load diff

1483
gerber/remote-F_Paste.gbr Normal file

File diff suppressed because it is too large Load diff

1927
gerber/remote-F_SilkS.gbr Normal file

File diff suppressed because it is too large Load diff

23
gerber/remote-NPTH.drl Normal file
View file

@ -0,0 +1,23 @@
M48
; DRILL file {KiCad (5.99.0-52-gefbc802f4)} date Mon Oct 28 15:02:16 2019
; FORMAT={-:-/ absolute / inch / decimal}
; #@! TF.CreationDate,2019-10-28T15:02:16+01:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.99.0-52-gefbc802f4)
; #@! TF.FileFunction,NonPlated,1,2,NPTH
FMAT,2
INCH
T1C0.0315
T2C0.1260
%
G90
G05
T1
X6.1339Y-4.5906
X6.1339Y-4.7874
T2
X6.1122Y-6.3386
X7.1654Y-6.3386
X7.1654Y-3.0315
X6.1122Y-3.0315
T0
M30

124
gerber/remote-PTH.drl Normal file
View file

@ -0,0 +1,124 @@
M48
; DRILL file {KiCad (5.99.0-52-gefbc802f4)} date Mon Oct 28 15:02:16 2019
; FORMAT={-:-/ absolute / inch / decimal}
; #@! TF.CreationDate,2019-10-28T15:02:16+01:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.99.0-52-gefbc802f4)
; #@! TF.FileFunction,Plated,1,2,PTH
FMAT,2
INCH
T1C0.0236
T2C0.0300
T3C0.0362
T4C0.0394
T5C0.0433
T6C0.0472
T7C0.0551
T8C0.0906
%
G90
G05
T1
X6.0709Y-4.1299
X6.1378Y-5.0354
X6.1969Y-3.9803
X6.3071Y-4.1299
X6.3071Y-5.7244
X6.3649Y-5.0901
X6.4075Y-5.0472
X6.4213Y-5.7165
X6.4449Y-5.0906
X6.4449Y-5.364
X6.4488Y-4.874
X6.4592Y-4.3332
X6.4606Y-4.9882
X6.4783Y-4.9356
X6.5054Y-5.4156
X6.548Y-5.156
X6.556Y-5.5149
X6.5593Y-5.404
X6.5709Y-5.2953
X6.5728Y-5.2087
X6.6181Y-5.1496
X6.622Y-4.4646
X6.6299Y-4.9016
X6.6457Y-4.7913
X6.6614Y-4.9646
X6.685Y-5.6142
X6.7047Y-4.3661
X6.7283Y-4.9016
X6.7323Y-5.1772
X6.7362Y-5.4134
X6.7441Y-5.3228
X6.7559Y-4.3228
X6.8386Y-4.5197
X6.8386Y-5.5591
X6.8504Y-4.8701
X6.878Y-5.1063
X6.9331Y-4.8661
X6.9803Y-5.1811
X7.0679Y-5.2598
X7.1102Y-5.4803
X7.1102Y-5.5472
X7.1535Y-4.2244
X7.248Y-3.2717
X7.252Y-4.374
X7.2559Y-5.2362
X7.2992Y-4.9921
X7.3189Y-4.8425
T2
X6.4961Y-4.0339
X6.4961Y-4.1339
X6.5961Y-4.0339
X6.5961Y-4.1339
X6.6961Y-4.0339
X6.6961Y-4.1339
X6.7961Y-4.0339
X6.7961Y-4.1339
T3
X7.4803Y-5.0394
X7.4803Y-5.1378
X7.4803Y-5.2165
X7.4803Y-5.315
X7.4803Y-6.0236
X7.4803Y-6.122
X7.4803Y-6.2008
X7.4803Y-6.2992
X7.4803Y-3.0709
X7.4803Y-3.1693
X7.4803Y-3.248
X7.4803Y-3.3465
X7.4803Y-4.0551
X7.4803Y-4.1535
X7.4803Y-4.2323
X7.4803Y-4.3307
T4
X6.2598Y-4.9646
X6.2795Y-4.4646
X7.2126Y-5.6496
X7.2776Y-3.8091
X6.624Y-5.8858
X6.724Y-5.8858
X6.824Y-5.8858
X6.924Y-5.8858
T5
X6.7559Y-4.6004
X6.7559Y-4.7776
X7.0118Y-4.6004
X7.0118Y-4.7776
T6
X6.0256Y-4.5364
X6.0256Y-4.8415
T7
X6.1752Y-4.5423
X6.1752Y-4.8356
T8
X7.587Y-3.9343
X7.587Y-4.4516
X7.587Y-4.9185
X7.587Y-5.4358
X7.587Y-5.9028
X7.587Y-6.4201
X7.587Y-2.95
X7.587Y-3.4673
T0
M30

431
remote-cache.lib Normal file
View file

@ -0,0 +1,431 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 4xxx_bom_item
#
DEF 4xxx_bom_item E 0 40 Y Y 1 F N
F0 "E" -100 0 50 H V L CNN
F1 "4xxx_bom_item" 50 0 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C -120 0 10 0 1 0 F
ENDDRAW
ENDDEF
#
# Connector_Conn_01x04_Male
#
DEF Connector_Conn_01x04_Male J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Connector_Conn_01x04_Male" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S 34 -195 0 -205 1 1 6 F
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
S 34 105 0 95 1 1 6 F
P 2 1 1 6 50 -200 34 -200 N
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
P 2 1 1 6 50 100 34 100 N
X Pin_1 1 200 100 150 L 50 50 1 1 P
X Pin_2 2 200 0 150 L 50 50 1 1 P
X Pin_3 3 200 -100 150 L 50 50 1 1 P
X Pin_4 4 200 -200 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_USB_A
#
DEF Connector_USB_A J 0 40 Y Y 1 F N
F0 "J" -200 450 50 H V L CNN
F1 "Connector_USB_A" -200 350 50 H V L CNN
F2 "" 150 -50 50 H I C CNN
F3 "" 150 -50 50 H I C CNN
$FPLIST
USB*
$ENDFPLIST
DRAW
C -150 85 25 0 1 10 F
C -25 135 15 0 1 10 F
S -200 -300 200 300 0 1 10 f
S -60 190 -170 210 0 1 0 F
S -50 180 -180 230 0 1 0 N
S -5 -300 5 -270 0 1 0 N
S 10 50 -20 20 0 1 10 F
S 200 -105 170 -95 0 1 0 N
S 200 -5 170 5 0 1 0 N
S 200 195 170 205 0 1 0 N
P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
P 4 0 1 10 25 110 25 60 75 85 25 110 F
P 2 1 1 10 -75 85 25 85 N
X VBUS 1 300 200 100 L 50 50 1 1 W
X D- 2 300 -100 100 L 50 50 1 1 P
X D+ 3 300 0 100 L 50 50 1 1 P
X GND 4 0 -400 100 U 50 50 1 1 W
X Shield 5 -100 -400 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_USB_B_Micro
#
DEF Connector_USB_B_Micro J 0 40 Y Y 1 F N
F0 "J" -200 450 50 H V L CNN
F1 "Connector_USB_B_Micro" -200 350 50 H V L CNN
F2 "" 150 -50 50 H I C CNN
F3 "" 150 -50 50 H I C CNN
ALIAS USB_B_Mini
$FPLIST
USB*
$ENDFPLIST
DRAW
C -150 85 25 0 1 10 F
C -25 135 15 0 1 10 F
S -200 -300 200 300 0 1 10 f
S -5 -300 5 -270 0 1 0 N
S 10 50 -20 20 0 1 10 F
S 200 -205 170 -195 0 1 0 N
S 200 -105 170 -95 0 1 0 N
S 200 -5 170 5 0 1 0 N
S 200 195 170 205 0 1 0 N
P 2 0 1 10 -75 85 25 85 N
P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
P 4 0 1 10 25 110 25 60 75 85 25 110 F
P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
X VBUS 1 300 200 100 L 50 50 1 1 w
X D- 2 300 -100 100 L 50 50 1 1 P
X D+ 3 300 0 100 L 50 50 1 1 P
X ID 4 300 -200 100 L 50 50 1 1 P
X GND 5 0 -400 100 U 50 50 1 1 w
X Shield 6 -100 -400 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_CP_Small
#
DEF Device_CP_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_CP_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
CP_*
$ENDFPLIST
DRAW
S -60 -12 60 -27 0 1 0 F
S -60 27 60 12 0 1 0 N
P 2 0 1 0 -50 60 -30 60 N
P 2 0 1 0 -40 50 -40 70 N
X ~ 1 0 100 73 D 50 50 1 1 P
X ~ 2 0 -100 73 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C_Small
#
DEF Device_C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Crystal_Small
#
DEF Device_Crystal_Small Y 0 40 N N 1 F N
F0 "Y" 0 100 50 H V C CNN
F1 "Device_Crystal_Small" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Crystal*
$ENDFPLIST
DRAW
S -30 -60 30 60 0 1 0 N
P 2 0 1 15 -50 -30 -50 30 N
P 2 0 1 15 50 -30 50 30 N
X 1 1 -100 0 50 R 50 50 1 1 P
X 2 2 100 0 50 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_LED_Small_ALT
#
DEF Device_LED_Small_ALT D 0 10 N N 1 F N
F0 "D" -50 125 50 H V L CNN
F1 "Device_LED_Small_ALT" -175 -100 50 H V L CNN
F2 "" 0 0 50 V I C CNN
F3 "" 0 0 50 V I C CNN
$FPLIST
LED*
LED_SMD:*
LED_THT:*
$ENDFPLIST
DRAW
P 2 0 1 0 -30 -40 -30 40 N
P 2 0 1 0 40 0 -30 0 N
P 4 0 1 0 30 -40 -30 0 30 40 30 -40 F
P 5 0 1 0 0 30 -20 50 -10 50 -20 50 -20 40 N
P 5 0 1 0 20 50 0 70 10 70 0 70 0 60 N
X K 1 -100 0 70 R 50 50 1 1 P
X A 2 100 0 70 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R_Small
#
DEF Device_R_Small R 0 10 N N 1 F N
F0 "R" 30 20 50 H V L CNN
F1 "Device_R_Small" 30 -40 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -30 70 30 -70 0 1 8 N
X ~ 1 0 100 30 D 50 50 1 1 P
X ~ 2 0 -100 30 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# MCU_ST_STM32F0_STM32F030F4Px
#
DEF MCU_ST_STM32F0_STM32F030F4Px U 0 20 Y Y 1 F N
F0 "U" -400 650 50 H V L CNN
F1 "MCU_ST_STM32F0_STM32F030F4Px" 200 650 50 H V L CNN
F2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" -400 -700 50 H I R CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TSSOP*4.4x6.5mm*P0.65mm*
$ENDFPLIST
DRAW
S -400 -700 400 600 0 1 10 f
X BOOT0 1 -500 300 100 R 50 50 1 1 I
X PA4 10 500 100 100 L 50 50 1 1 B
X PA5 11 500 0 100 L 50 50 1 1 B
X PA6 12 500 -100 100 L 50 50 1 1 B
X PA7 13 500 -200 100 L 50 50 1 1 B
X PB1 14 -500 -600 100 R 50 50 1 1 B
X VSS 15 0 -800 100 U 50 50 1 1 W
X VDD 16 0 700 100 D 50 50 1 1 W
X PA9 17 500 -300 100 L 50 50 1 1 B
X PA10 18 500 -400 100 L 50 50 1 1 B
X PA13 19 500 -500 100 L 50 50 1 1 B
X PF0 2 -500 -300 100 R 50 50 1 1 I
X PA14 20 500 -600 100 L 50 50 1 1 B
X PF1 3 -500 -400 100 R 50 50 1 1 I
X NRST 4 -500 500 100 R 50 50 1 1 I
X VDDA 5 100 700 100 D 50 50 1 1 W
X PA0 6 500 500 100 L 50 50 1 1 B
X PA1 7 500 400 100 L 50 50 1 1 B
X PA2 8 500 300 100 L 50 50 1 1 B
X PA3 9 500 200 100 L 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Mechanical_MountingHole
#
DEF Mechanical_MountingHole H 0 40 Y Y 1 F N
F0 "H" 0 200 50 H V C CNN
F1 "Mechanical_MountingHole" 0 125 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
MountingHole*
$ENDFPLIST
DRAW
C 0 0 50 0 1 50 N
ENDDRAW
ENDDEF
#
# RF_NRF24L01_Breakout
#
DEF RF_NRF24L01_Breakout U 0 40 Y Y 1 F N
F0 "U" -350 500 50 H V L CNN
F1 "RF_NRF24L01_Breakout" 150 500 50 H V L CNN
F2 "RF_Module:nRF24L01_Breakout" 150 600 50 H I L CIN
F3 "" 0 -100 50 H I C CNN
$FPLIST
nRF24L01*Breakout*
$ENDFPLIST
DRAW
A 175 100 112 1166 -266 0 1 10 N 125 200 275 50
A 175 101 49 900 -11 0 1 10 N 175 150 225 100
A 175 101 78 1087 -191 0 1 10 N 150 175 250 75
C 175 100 25 0 1 10 F
S -350 450 350 -450 0 1 10 f
S 450 -750 450 -750 0 1 0 N
P 2 0 1 10 175 75 175 -50 N
X GND 1 0 -600 150 U 50 50 1 1 W
X VCC 2 0 600 150 D 50 50 1 1 W
X CE 3 -500 -200 150 R 50 50 1 1 I
X ~CSN 4 -500 0 150 R 50 50 1 1 I
X SCK 5 -500 100 150 R 50 50 1 1 I C
X MOSI 6 -500 300 150 R 50 50 1 1 I
X MISO 7 -500 200 150 R 50 50 1 1 O
X IRQ 8 -500 -300 150 R 50 50 1 1 O
ENDDRAW
ENDDEF
#
# Regulator_Linear_AMS1117-3.3
#
DEF Regulator_Linear_AMS1117-3.3 U 0 10 Y Y 1 F N
F0 "U" -150 125 50 H V C CNN
F1 "Regulator_Linear_AMS1117-3.3" 0 125 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-223-3_TabPin2" 0 200 50 H I C CNN
F3 "" 100 -250 50 H I C CNN
ALIAS AP1117-18 AP1117-25 AP1117-33 AP1117-50 LD1117S33TR_SOT223 LD1117S12TR_SOT223 LD1117S18TR_SOT223 LD1117S25TR_SOT223 LD1117S50TR_SOT223 NCP1117-12_SOT223 NCP1117-1.5_SOT223 NCP1117-1.8_SOT223 NCP1117-2.0_SOT223 NCP1117-2.5_SOT223 NCP1117-2.85_SOT223 NCP1117-3.3_SOT223 NCP1117-5.0_SOT223 AMS1117-1.5 AMS1117-1.8 AMS1117-2.5 AMS1117-2.85 AMS1117-3.3 AMS1117-5.0
$FPLIST
SOT?223*TabPin2*
$ENDFPLIST
DRAW
S -200 -200 200 75 0 1 10 f
X GND 1 0 -300 100 U 50 50 1 1 W
X VO 2 300 0 100 L 50 50 1 1 w
X VI 3 -300 0 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# Switch_SW_Push_Dual
#
DEF Switch_SW_Push_Dual SW 0 40 Y N 1 F N
F0 "SW" 50 100 50 H V L CNN
F1 "Switch_SW_Push_Dual" 0 -270 50 H V C CNN
F2 "" 0 200 50 H I C CNN
F3 "" 0 200 50 H I C CNN
DRAW
C -80 -200 20 0 1 0 N
C -80 0 20 0 1 0 N
C 80 -200 20 0 1 0 N
C 80 0 20 0 1 0 N
P 2 0 1 0 0 -120 0 -140 N
P 2 0 1 0 0 -80 0 -100 N
P 2 0 1 0 0 -60 0 -40 N
P 2 0 1 0 0 -20 0 0 N
P 2 0 1 0 0 20 0 40 N
P 2 0 1 0 0 50 0 120 N
P 2 0 1 0 100 -150 -100 -150 N
P 2 0 1 0 100 50 -100 50 N
X 1 1 -200 0 100 R 50 50 0 1 P
X 2 2 200 0 100 L 50 50 0 1 P
X 3 3 -200 -200 100 R 50 50 0 1 P
X 4 4 200 -200 100 L 50 50 0 1 P
ENDDRAW
ENDDEF
#
# Transistor_FET_IRLML6402
#
DEF Transistor_FET_IRLML6402 Q 0 0 Y N 1 F N
F0 "Q" 200 75 50 H V L CNN
F1 "Transistor_FET_IRLML6402" 200 0 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-23" 200 -75 50 H I L CIN
F3 "" 0 0 50 H I L CNN
ALIAS VP0610T BSS84 NTR2101P BSS83P Si2319CDS IRLML6402
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
C 65 0 111 0 1 10 N
C 100 -70 11 0 1 0 F
C 100 70 11 0 1 0 F
P 2 0 1 0 -100 0 10 0 N
P 2 0 1 0 30 -70 100 -70 N
P 2 0 1 10 30 -50 30 -90 N
P 2 0 1 0 30 0 100 0 N
P 2 0 1 10 30 20 30 -20 N
P 2 0 1 0 30 70 100 70 N
P 2 0 1 10 30 90 30 50 N
P 2 0 1 0 100 -70 100 -100 N
P 2 0 1 0 100 -70 100 0 N
P 2 0 1 0 100 100 100 70 N
P 3 0 1 10 10 75 10 -75 10 -75 N
P 4 0 1 0 90 0 50 -15 50 15 90 0 F
P 4 0 1 0 100 -70 130 -70 130 70 100 70 N
P 4 0 1 0 110 -20 115 -15 145 -15 150 -10 N
P 4 0 1 0 130 -15 115 10 145 10 130 -15 N
X G 1 -200 0 100 R 50 50 1 1 I
X S 2 100 -200 100 U 50 50 1 1 P
X D 3 100 200 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_+3V3
#
DEF power_+3V3 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+3V3" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_VBUS
#
DEF power_VBUS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_VBUS" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X VBUS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

3660
remote.kicad_pcb Normal file

File diff suppressed because it is too large Load diff

BIN
remote.pdf Normal file

Binary file not shown.

286
remote.pro Normal file
View file

@ -0,0 +1,286 @@
update=Mon Oct 28 15:02:27 2019
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
LastSTEPExportPath=
LastIDFExportPath=
LastVRMLExportPath=
LastSpecctraDSNExportPath=
LastGenCADExportPath=
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
CopperEdgeClearance=0.01
TrackWidth1=0.25
TrackWidth2=0.2
TrackWidth3=0.3
TrackWidth4=0.5
TrackWidth5=0.8
TrackWidth6=1.2
TrackWidth7=1.8
TrackWidth8=2.8
ViaDiameter1=0.8
ViaDrill1=0.4
ViaDiameter2=0.6
ViaDrill2=0.3
ViaDiameter3=0.8
ViaDrill3=0.4
ViaDiameter4=1.2
ViaDrill4=0.6
ViaDiameter5=2
ViaDrill5=1
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.125
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=bus
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_WriteFile=0
ERC_TestSimilarLabels=1
ERC_CheckUniqueGlobalLabels=1
ERC_CheckBusDriverConflicts=1
ERC_CheckBusEntryConflicts=1
ERC_CheckBusToBusConflicts=1
ERC_CheckBusToNetConflicts=1

1412
remote.sch Normal file

File diff suppressed because it is too large Load diff

1398
remote.sch-bak Normal file

File diff suppressed because it is too large Load diff

1030
remote.xml Normal file

File diff suppressed because it is too large Load diff