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Add an attempt at edge enhancement.

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This commit is contained in:
Mike Field 2015-09-01 13:28:13 +12:00
parent 41a6b746c3
commit 6eb63dadc1
3 changed files with 22 additions and 24 deletions
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13
Artix-7-HDMI-processing.xpr
View file

@ -133,6 +133,12 @@
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/src/symbol_dump.vhd">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/src/pixel_processing.vhd">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
@ -151,13 +157,6 @@
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/src/symbol_dump.vhd">
<FileInfo>
<Attr Name="AutoDisabled" Val="1"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="hdmi_design"/>

13
src/edge_enhance.vhd
View file

@ -207,24 +207,23 @@ process(clk)
out_blank <= sobel_3_blank;
out_vsync <= sobel_3_vsync;
if sobel_3_red(12 downto 11) = "00" then
out_red <= std_logic_vector(sobel_3_red(10 downto 3));
if sobel_3_red(12 downto 12) = "0" then
out_red <= std_logic_vector(sobel_3_red(11 downto 4));
else
out_red <= (others => '1');
end if;
if sobel_3_green(12 downto 11) = "00" then
out_green <= std_logic_vector(sobel_3_green(10 downto 3));
if sobel_3_green(12 downto 12) = "0" then
out_green <= std_logic_vector(sobel_3_green(11 downto 4));
else
out_green <= (others => '1');
end if;
if sobel_3_blue(12 downto 11) = "00" then
out_blue <= std_logic_vector(sobel_3_blue(10 downto 3));
if sobel_3_blue(12 downto 12) = "0" then
out_blue <= std_logic_vector(sobel_3_blue(11 downto 4));
else
out_blue <= (others => '1');
end if;
else
out_hsync <= bypass_3_hsync;
out_blank <= bypass_3_blank;

18
src/hdmi_design.vhd
View file

@ -334,14 +334,14 @@ i_processing: pixel_processing Port map (
-- Swap to this if you want to capture the HDMI symbols
-- and send them up the RS232 port
rs232_tx <= '1';
--i_symbol_dump: symbol_dump port map (
-- clk => pixel_clk,
-- clk100 => clk100,
-- symbol_sync => symbol_sync,
-- symbol_ch0 => symbol_ch0,
-- symbol_ch1 => symbol_ch1,
-- symbol_ch2 => symbol_ch2,
-- rs232_tx => rs232_tx);
--rs232_tx <= '1';
i_symbol_dump: symbol_dump port map (
clk => pixel_clk,
clk100 => clk100,
symbol_sync => symbol_sync,
symbol_ch0 => symbol_ch0,
symbol_ch1 => symbol_ch1,
symbol_ch2 => symbol_ch2,
rs232_tx => rs232_tx);
end Behavioral;