162 lines
6.2 KiB
Python
162 lines
6.2 KiB
Python
#!/usr/bin/env python3
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import re
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import math
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from dataclasses import replace
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import gerbonara.cad.kicad.pcb as pcb
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import gerbonara.cad.primitives as cad_pr
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r = 85
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cx, cy = 150, 100
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prev_next_cycle = lambda l: zip(l[-1:] + l[:-1], l, l[1:] + l[:1])
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si_prefixes = {'k': 1e3, 'M': 1e6, 'G': 1e9, 'm': 1e-3, 'u': 1e-6, 'µ': 1e-6, 'n': 1e-9, 'p': 1e-12, '.': 1, 'r': 1}
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def parse_si(s, unit=''):
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if not (match := re.fullmatch(f'([0-9]*)(([.pPnNuUµmrRkKMgG])([0-9]*))?([pPnNuUµmrRkKMgG]?)({unit})?', s)):
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raise ValueError(f'{s} is not a valid number with an SI prefix')
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left, _1, dot, right, prefix, _unit = match.groups()
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prefix = prefix or dot or '.'
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multiplier = si_prefixes.get(prefix, si_prefixes.get(prefix.upper(), si_prefixes.get(prefix.lower())))
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return float(f'{left}.{right or ""}0') * multiplier
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b = pcb.Board.open('self-balancing-test-a.kicad_pcb')
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b.unfill_zones()
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matches = list(b.find_footprints(name='Package_TO_SOT_SMD:SOT-23', sheetfile='resistor_bank.kicad_sch'))
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components = []
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for transistor in sorted(matches, key=lambda fp: fp.parsed_reference[1]):
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r1, r2 = transistor.pads_by_number[3].find_connected(name='Resistor_SMD.*')
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if parse_si(r1.value) > parse_si(r2.value):
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r1, r2 = r2, r1
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cap, = transistor.pads_by_number[3].find_connected(name='Capacitor_SMD.*')
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components.append((transistor, r1, r2, cap))
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num_lgs = 8
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lg_pitch = 1
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for i, (fp, res1, res2, cap) in enumerate(components):
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alpha = 2*math.pi * i/len(matches)
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fp.at.x, fp.at.y = cx+r, cy
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fp.set_rotation(0)
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for text in fp.texts:
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text.at.rotation = 0
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for prop in fp.properties:
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prop.at.rotation = 0
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cap.at.x, cap.at.y = cx+r+5, cy
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cap.side = 'back'
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cap.face('top', pad=1)
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res1.at.x, res1.at.y = cx+r+5, cy+2
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res1.face('right', net='*/V+')
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res2.at.x, res2.at.y = cx+r+5, cy-2
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res2.face('right', net='*/V+')
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gnd_via = pcb.Via(at=pcb.XYCoord(fp.pad(2)).with_offset(y=1.5),
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size=1.2,
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drill=0.6,
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net=fp.pad(2).net.number
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)
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b.add(gnd_via)
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lg = int(re.search(r'[0-9]*$', fp.pad(1).net.name).group(0))
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lg_via = pcb.Via(at=pcb.XYCoord(fp.pad(1)).with_offset(x=-2-lg_pitch*lg),
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size=0.8,
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drill=0.4,
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net=fp.pad(1).net.number
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)
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b.add(lg_via)
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x1, y1, _r, _f = res1.pad(2).abs_pos
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x2, y2, _r, _f = res2.pad(2).abs_pos
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x3, y3, _r, _f = res1.pad(1).abs_pos
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x4, y4, _r, _f = res2.pad(1).abs_pos
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mp = (x1+x2)/2, (y1+y2)/2
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for tr, net_name in [
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(cad_pr.Trace(1.5, res1.pad(2), res2.pad(2), orientation=['ccw']), fp.pad(3).net.name),
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(cad_pr.Trace(0.5, fp.pad(3), mp, orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, mp, (mp[0]+1.5, mp[1]), orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x1, y1), (x1, y1+2), orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x1-1, y1+2), (x1+1.6, y1+2), orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x2, y2), (x2, y2-2), orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x2-1, y2-2), (x2+1.6, y2-2), orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x3, y3), (x3+1.5, y3), orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x4, y4), (x4+1.5, y4), orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x3+1.5, y3-0.8), (x3+1.5, y3+0.8), orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x4+1.5, y4-0.8), (x4+1.5, y4+0.8), orientation=['cw']), fp.pad(3).net.name),
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(cad_pr.Trace(0.5, res1.pad(1), res2.pad(1)), res1.pad(1).net.name),
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(cad_pr.Trace(0.5, fp.pad(2), gnd_via), fp.pad(2).net.name),
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(cad_pr.Trace(0.5, fp.pad(1), lg_via), fp.pad(1).net.name),
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(cad_pr.Trace(1.5, (x1-1, y1+2), (x1+1.6, y1+2), orientation=['cw'], side='bottom'), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x2-1, y2-2), (x2+1.6, y2-2), orientation=['cw'], side='bottom'), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, mp, (mp[0]+1.5, mp[1]), orientation=['cw'], side='bottom'), fp.pad(3).net.name),
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(cad_pr.Trace(1.5, (x1+1.6, y1+2), (x2+1.6, y2-2), orientation=['cw'], side='bottom'), fp.pad(3).net.name),
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]:
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for obj in b.map_gn_cad(tr, net_name=net_name):
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obj.rotate(alpha, cx, cy)
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b.add(obj)
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for j in range(-1, 2):
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for i in range(3):
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therm_via = pcb.Via(at=pcb.XYCoord(mp).with_offset(x=(i-1)*1.3 + 0.3, y=j*4),
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size=1.2,
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drill=0.6,
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net=fp.pad(3).net.number
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)
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b.add(therm_via)
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therm_via.rotate(alpha, cx, cy)
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for x, y in (x3, y3), (x4, y4):
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for i in -1, 1:
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therm_via = pcb.Via(at=(x+1.5, y+i*0.8),
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size=1.2,
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drill=0.6,
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net=fp.pad(3).net.number
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)
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b.add(therm_via)
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therm_via.rotate(alpha, cx, cy)
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for i in range(num_lgs):
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p1 = pcb.XYCoord(fp.pad(1)).with_offset(x=-2-lg_pitch*i)
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arc = pcb.TrackArc(
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start=p1,
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end=p1.with_rotation(2*math.pi / len(matches), cx, cy),
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center=(cx, cy),
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layer='B.Cu',
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width=0.5,
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net=b.net_id(f'LG{i}'),
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)
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arc.rotate(alpha, cx, cy)
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b.add(arc)
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gnd_via.rotate(alpha, cx, cy)
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lg_via.rotate(alpha, cx, cy)
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fp.rotate(alpha, cx, cy)
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res1.rotate(alpha, cx, cy)
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res2.rotate(alpha, cx, cy)
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cap.rotate(alpha, cx, cy)
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for i, ((prev_q, prev_r1, prev_r2, prev_cap), (fp, res1, res2, cap), (next_q, next_r1, next_r2, next_cap)) in enumerate(prev_next_cycle(components)):
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if res1.pad(1).net == next_r2.pad(1).net:
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arc = pcb.TrackArc(
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end=res1.pad(1),
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center=(cx, cy),
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start=next_r2.pad(1),
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width=0.5,
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net=res2.pad(1).net.number,
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)
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b.add(arc)
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b.write('self-balancing-test-a.testout.kicad_pcb')
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