Improve sampling mesh monitor paper integration
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doing so than legitimate users are willing to spend routinely!
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}
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\chaptertitle{Inertial Hardware Security Modules}
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\label{chapter-ihsm}
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\section{Introduction}
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@ -22,7 +22,8 @@ lower-security applications such as card payment terminals, simpler approaches a
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implementation. Often, standard copper/polyimide Flexible Printed Circuits (FPCs) or even standard Printed Circuit
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Boards (PCBs) are used because of the wide availability of manufacturing services.
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Several academic approaches exist that target low-cost~\cite{
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Inertial HSMs are one approach that enables the use of less expensive, commodity materials in high-security
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applications. Several other academic approaches exist that target low-cost~\cite{
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vasileActiveTamperDetection2017,
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vasileTemperatureSensitiveActive2017,
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dupontMiniaturizedUltraLowPowerTamper2022,
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@ -54,10 +55,11 @@ specialty components.
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\end{figure}
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To enable the use of less expensive, commodity materials such as Printed Circuit Boards (PCBs) without compromising
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security, mesh integrity must be monitored with high fidelity. In this paper, we present a low-cost monitoring circuit
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security, mesh integrity must be monitored with high fidelity. In this chapter, we present a low-cost monitoring circuit
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for security meshes that combines Time Domain Reflectometry (TDR) with equivalent time sampling. Our approach provides
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high measurement fidelity and enables the use of meshes made from less expensive materials in high-security
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applications.
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applications. Our design directly applies to IHSM implementations, and complements the security offered by the IHSM's
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mechanical motion.
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Our circuit generates a very fast pulse with a rise time lower than \qty{200}{\pico\second} that is broadcast into the
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mesh. While the pulse traverses the mesh, parts of its energy are reflected on imperfections inside the mesh, including
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@ -326,9 +328,9 @@ length.
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\subsection{Attacks on a Security Mesh Viewed Using TDR}
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In this paper, we apply TDR to monitor a security mesh for changes caused by an attack. Our prototype setup consists of
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a custom circuit board containing a low-cost embedded TDR frontend that can be connected to a security mesh specimen to
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measure its response, creating a fingerprint of the mesh. In a standard PCB manufacturing process, we construct a
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In this chapter, we apply TDR to monitor a security mesh for changes caused by an attack. Our prototype setup consists
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of a custom circuit board containing a low-cost embedded TDR frontend that can be connected to a security mesh specimen
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to measure its response, creating a fingerprint of the mesh. In a standard PCB manufacturing process, we construct a
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security mesh with a ground plane underneath that works similarly to previous work~\cite{
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immlerBTREPIDBatterylessTamperresistant2018,
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obermaierMeasurementSystemCapacitive2018,
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@ -365,9 +367,9 @@ multiplexers.
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A typical system design for an HSM with TDR-based tamper sensing meshes would consist of a PCB assembly containing
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payload components as well as the mesh monitoring circuit. Tamper-sensing meshes made from rigid or flexible PCBs would
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enclose this PCB assembly from all directions. In this paper we propose meshes that have a ground plane, which would be
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on the outer side of the mesh PCBs and shield the system against electromagnetic interference. Mesh monitoring would be
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battery powered and would periodically check for tamper attempts.
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enclose this PCB assembly from all directions. In this chapter we propose meshes that have a ground plane, which would
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be on the outer side of the mesh PCBs and shield the system against electromagnetic interference. Mesh monitoring would
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be battery powered and would periodically check for tamper attempts.
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We consider an attacker motivated to extract the payload's secrets. Self-destruction by deleting secrets would suffice
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as tamper response against this type of attacker. Such an attacker might want to probe parts of the payload circuit
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@ -397,8 +399,8 @@ attack tools, or specialized tools for large-scale industrial manufacturing such
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A TDR can be broken down into three basic components: A source of fast stimulus pulses (or edges!), a coupler that
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separates stimulus pulses and their reflection at the output, and a fast ADC to capture the reflections.
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Figure\ \ref{fig_block_diagram} shows a block diagram of our design\footnote{Full schematics are available in this
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paper's supplementary material.}. At the core of our design lies an equivalent time sampling setup, where two
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Figure\ \ref{fig_block_diagram} shows a block diagram of our design\footnote{Full schematics are available in the
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supplementary material of this thesis.}. At the core of our design lies an equivalent time sampling setup, where two
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diode bridge sampling gates alternately sample the two traces of the mesh.
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Since physical attacks happen on a time scale of minutes or hours, we do not need a fast acquisition rate. Equivalent
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time sampling uses fast sampling gates to sample a high-frequency signal at a low frequency that is suitable for direct
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@ -444,7 +446,7 @@ determines the pulse width.
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We evaluated multiple options for the pulse shaping amplifier in our design. For both sampling and stimulus, we work
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with fully differential signals, so Current Mode Logic (CML) devices, which are widely used in high-speed logic, are a
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natural fit. We settled on four parts for evaluation in this paper: A \partno{74LVC2G157} standard logic IC, two
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natural fit. We settled on four parts for evaluation in this chapter: A \partno{74LVC2G157} standard logic IC, two
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HDMI/DisplayPort redrivers, \partno{PI3HDX12211} and \partno{TDP0604}, as well as \partno{MAX3748}, a limiting amplifier
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for optical networking. Figure\ \ref{fig_pic_amps} shows the four hand-soldered prototypes. We avoided specialty parts
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such as the CML-output comparators made by Analog Devices due to cost.
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@ -798,8 +800,8 @@ lines here and for \partno{TDP0604} since the other amplifiers' output did not c
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\qty{26}{\nano\second}\\
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\end{tabular}
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\end{center}
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\caption{Specifications of mesh test specimens used in the experiments in this paper. Approximate signal delays were
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calculated using wave velocity
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\caption{Specifications of mesh test specimens used in the experiments in this chapter. Approximate signal delays
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were calculated using wave velocity
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$v=\frac{c}{\sqrt{\epsilon_r}}\approx\frac{c}{2}$~\cite{wheelerTransmissionLinePropertiesParallel1965} assuming
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$\epsilon_r\approx 4$~\cite{mumbyDielectricPropertiesFR41989} for the test specimens' \partno{FR-4} substrate.}
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\label{tab_mesh_spec}
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@ -939,7 +941,7 @@ might be sensitive enough to pick up on manufacturing variations from one copy t
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evaluate this scenario, in Figure~\ref{fig_layout_identity_identity} we show the result of repeated measurements of
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three copies of the same mesh. The measurements were taken interleaved ($1, 2, 3, 1, 2, \hdots$) to exclude systematic
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errors. We found our system can indeed distinguish multiple copies of the same mesh at a 1.7\% FNR at 0.1\% FPR. We
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leave a detailed analysis of this effect to future work. For the scope of this paper, the presence of this effect
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leave a detailed analysis of this effect to future work. For the scope of this chapter, the presence of this effect
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indicates good performance of our design, and increases the detection efficiency of our approach.
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\begin{figure}
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@ -1214,7 +1216,7 @@ classification performance remaining approximately constant at 69.0\% FNR at 0.1
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\hspace*{2mm}
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\caption{Classifier similarity scores of measurements in different environments, 10
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measurements each. For scale, measurements from Figure~\ref{fig_patch_large_scale} are included on the
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bottom/right. FNR 69.0\% at 0.1\% FPR, CER=22\%.}
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bottom/right. FNR 69.0\% at 0.1\% FPR, CER=22\%.}~
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\label{fig_env_covar}
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\end{figure}
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@ -1264,8 +1266,8 @@ timing to focus attention on the parts of the response signal that are most susc
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single-shot classifier that only observes measurements in isolation to a more advanced approach that considers the full
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history of measurements during the mesh's lifetime would also likely improve performance.
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\paragraph{Auxiliary applications.} The low-cost, embedded TDR frontend presented in this paper could be used for other
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monitoring tasks from tamper sensing to system health monitoring. For instance,
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\paragraph{Auxiliary applications.} The low-cost, embedded TDR frontend presented in this chapter could be used for
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other monitoring tasks from tamper sensing to system health monitoring. For instance,
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\textcite{vaiSecureArchitectureEmbedded2015} propose checking the integrity of a PCBA using an external Vector Network
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Analyzer (VNA) attached to test points on the PCBA's Power Distribution Network (PDN). TDR can produce fingerprints
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similar to a VNA and it would be interesting to measure parts of the secure subsystem other than its security mesh using
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@ -1278,10 +1280,10 @@ it indeed rises to the level of a PUF in entropy and repeatability.
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\section{Conclusion}
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In this paper, we presented a design for a low-cost frontend for integrity monitoring of security meshes in applications
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such as HSMs based on the principles of sub-nanosecond Time Domain Reflectometry. Our design repurposes an inexpensive
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HDMI redriver IC and uses a microwave clip line to form fast pulses for TDR sampling. Our design creates a detailed
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fingerprint of the intact mesh's condition that not only captures the length of the mesh's traces but that can
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In this chapter, we presented a design for a low-cost frontend for integrity monitoring of security meshes in
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applications such as HSMs based on the principles of sub-nanosecond Time Domain Reflectometry. Our design repurposes an
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inexpensive HDMI redriver IC and uses a microwave clip line to form fast pulses for TDR sampling. Our design creates a
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detailed fingerprint of the intact mesh's condition that not only captures the length of the mesh's traces but that can
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distinguish copies of the same mesh.
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We have demonstrated our prototype circuit's capability to reliably detect and distinguish a wide range of practical
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@ -1290,5 +1292,8 @@ detecting tiny, micro-soldered patch wires.
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Compared to the state of the art, our approach enables the monitoring of larger meshes, at higher sensitivity and lower
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cost. Our is easy to replicate, does not require any specialized or custom components, and unlocks high-security
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applications for security meshes made using low-cost, standard PCB manufacturing processes.
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applications for security meshes made using low-cost, standard PCB manufacturing processes. The improved monitoring
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approach we presented in this chapter directly complements the IHSM concept we introduced in Chapter~\ref{chapter-ihsm}.
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Both designs can be combined into a joint system that provides a level of tamper resistance beyond the state of the art
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in both acadmic designs and in commercial offerings.
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