Update bibliography

main.bib

@@ -529,7 +529,7 @@
   file = {/home/jaseg/Zotero/storage/YYVWKXCV/Batra et al. - 2015 - Effect of ferrite addition above the base ferrite .pdf}
 }
 
-@incollection{baumMozMathbbArella2022,
+@incollection{baumMoz$$mathbbZ_2^k$$arellaEfficient2022,
   title = {Moz\$\$\textbackslash mathbb \{\vphantom\}{{Z}}\vphantom\{\}\_\{2\textasciicircum k\}\$\$arella: {{Efficient Vector-OLE}} and {{Zero-Knowledge Proofs}} over \$\$\textbackslash mathbb \{\vphantom\}{{Z}}\vphantom\{\}\_\{2\textasciicircum k\}\$\$},
   shorttitle = {Moz\$\$\textbackslash mathbb \{\vphantom\}{{Z}}\vphantom\{\}\_\{2\textasciicircum k\}\$\$arella},
   booktitle = {Advances in {{Cryptology}} – {{CRYPTO}} 2022},
@@ -2103,6 +2103,21 @@
   file = {/home/jaseg/Zotero/storage/CS2J3R4Q/42416.html}
 }
 
+@article{fujimotoDemonstrationHTDetectionMethod2018,
+  title = {A {{Demonstration}} of a {{HT-Detection Method Based}} on {{Impedance Measurements}} of the {{Wiring Around ICs}}},
+  author = {Fujimoto, Daisuke and Nin, Shota and Hayashi, Yu-Ichi and Miura, Noriyuki and Nagata, Makoto and Matsumoto, Tsutomu},
+  date = {2018-10},
+  journaltitle = {IEEE Transactions on Circuits and Systems II: Express Briefs},
+  shortjournal = {IEEE Trans. Circuits Syst. II},
+  volume = {65},
+  number = {10},
+  pages = {1320--1324},
+  issn = {1549-7747, 1558-3791},
+  doi = {10.1109/TCSII.2018.2858798},
+  url = {https://ieeexplore.ieee.org/document/8418748/},
+  urldate = {2025-09-30}
+}
+
 @article{ganjiHighPerformancePlanar2017,
   title = {High Performance Planar Micro-Transformer Using Novel Crossover Connection},
   author = {Ganji, Bahram Azizollah and Molanzadeh, Mohammad},
@@ -4672,6 +4687,23 @@
   langid = {english}
 }
 
+@inproceedings{mosavirikBackMonICBackside2024,
+  title = {{{BackMon}}: {{IC Backside Tamper Detection}} Using {{On-Chip Impedance Monitoring}}},
+  shorttitle = {{{BackMon}}},
+  booktitle = {Proceedings of the 2024 {{Workshop}} on {{Attacks}} and {{Solutions}} in {{Hardware Security}}},
+  author = {Mosavirik, Tahoura and Tajik, Shahin},
+  date = {2024-11-19},
+  pages = {68--77},
+  publisher = {ACM},
+  location = {Salt Lake City UT USA},
+  doi = {10.1145/3689939.3695784},
+  url = {https://dl.acm.org/doi/10.1145/3689939.3695784},
+  urldate = {2025-09-30},
+  eventtitle = {{{CCS}} '24: {{ACM SIGSAC Conference}} on {{Computer}} and {{Communications Security}}},
+  isbn = {979-8-4007-1235-7},
+  langid = {english}
+}
+
 @article{mosavirikImpedanceVerifOnChipImpedance2022,
   title = {{{ImpedanceVerif}}: {{On-Chip Impedance Sensing}} for {{System-Level Tampering Detection}}},
   shorttitle = {{{ImpedanceVerif}}},
@@ -5869,6 +5901,23 @@
   publisher = {Walter de Gruyter \& Co.}
 }
 
+@article{saadatsafaNearFieldMicrowaveSensing2025,
+  title = {Near-{{Field Microwave Sensing}} for {{Chip-Level Tamper Detection}}},
+  author = {Saadat Safa, Maryam and Tajik, Shahin},
+  date = {2025-07-05},
+  journaltitle = {Sensors},
+  shortjournal = {Sensors},
+  volume = {25},
+  number = {13},
+  pages = {4188},
+  issn = {1424-8220},
+  doi = {10.3390/s25134188},
+  url = {https://www.mdpi.com/1424-8220/25/13/4188},
+  urldate = {2025-09-30},
+  abstract = {Stealthy chip-level tamper attacks, such as hardware Trojan insertions or security-critical circuit modifications, can threaten modern microelectronic systems’ security. While traditional inspection and side-channel methods offer potential for tamper detection, they may not reliably detect all forms of attacks and often face practical limitations in terms of scalability, accuracy, or applicability. This work introduces a non-invasive, contactless tamper detection method employing a complementary split-ring resonator (CSRR). CSRRs, which are typically deployed for non-destructive material characterization, can be placed on the surface of the chip’s package to detect subtle variations in the impedance of the chip’s power delivery network (PDN) caused by tampering. The changes in the PDN’s impedance profile perturb the local electric near field and consequently affect the sensor’s impedance. These changes manifest as measurable variations in the sensor’s scattering parameters. By monitoring these variations, our approach enables robust and cost-effective physical integrity verification requiring neither physical contact with the chips or printed circuit board (PCB) nor activation of the underlying malicious circuits. To validate our claims, we demonstrate the detection of various chip-level tamper events on an FPGA manufactured with 28 nm technology.},
+  langid = {english}
+}
+
 @inproceedings{sadeqPrivacyBreachAndroid2022,
   title = {Privacy {{Breach}} in {{Android Smartphone Through Inaudible Sound}}},
   booktitle = {2022 {{IEEE Wireless Communications}} and {{Networking Conference}} ({{WCNC}})},
@@ -5903,6 +5952,22 @@
   file = {/home/jaseg/Zotero/storage/LYZND7TS/Saeif et al. - 2023 - The Day-After-Tomorrow On the Performance of Radi.pdf}
 }
 
+@inproceedings{safaCounterfeitChipDetection2023,
+  title = {Counterfeit {{Chip Detection}} Using {{Scattering Parameter Analysis}}},
+  booktitle = {2023 26th {{International Symposium}} on {{Design}} and {{Diagnostics}} of {{Electronic Circuits}} and {{Systems}} ({{DDECS}})},
+  author = {Safa, Maryam Saadat and Mosavirik, Tahoura and Tajik, Shahin},
+  date = {2023-05-03},
+  pages = {99--104},
+  publisher = {IEEE},
+  location = {Tallinn, Estonia},
+  doi = {10.1109/DDECS57882.2023.10139623},
+  url = {https://ieeexplore.ieee.org/document/10139623/},
+  urldate = {2025-09-30},
+  eventtitle = {2023 26th {{International Symposium}} on {{Design}} and {{Diagnostics}} of {{Electronic Circuits}} and {{Systems}} ({{DDECS}})},
+  isbn = {979-8-3503-3277-3},
+  file = {/home/jaseg/Zotero/storage/T9KWPNZX/Safa et al. - 2023 - Counterfeit Chip Detection using Scattering Parameter Analysis.pdf}
+}
+
 @article{sagarStudiesTemperatureDependent2024,
   title = {Studies on Temperature Dependent Dielectric Properties of Some Insulators down to Liquid Helium Temperatures},
   author = {Sagar, Pankaj and Akber, Kashif},