Add terminology notes
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@ -111,12 +111,19 @@ mid-2000s era slot machines in Germany that includes a tamper-sensing mesh, pres
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cloning. This device will also be analyzed later in this chapter.
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cloning. This device will also be analyzed later in this chapter.
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\section{The Principles of Tamper-Sensing Mesh Construction and Monitoring}
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\section{The Principles of Tamper-Sensing Mesh Construction and Monitoring}
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\subsection{Security Mesh Manufacturing}
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\subsection{Security Mesh Manufacturing}
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\subsection{Security Mesh Monitoring}
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\subsection{Security Mesh Monitoring}
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\subsection{Other Tamper Sensing Techniques}
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\subsection{Other Tamper Sensing Techniques}
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\subsection{Hardware Security Module Applications}
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\subsection{Hardware Security Module Applications}
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\subsection{The Patent Landscape}
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\subsection{The Patent Landscape}
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Tamper-sensing meshes can be implemented
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\section{A Survey of Meshes in the Wild}
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\section{A Survey of Meshes in the Wild}
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Concluding the brief history of tamper sensing meshes above, we find that they were initially developed for sensitive
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Concluding the brief history of tamper sensing meshes above, we find that they were initially developed for sensitive
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@ -121,7 +121,77 @@ it can have gaps that allow for air flow between outside and inside, enabling ac
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cooling capability sharply increases computing power by increasing feasible payload power dissipation by
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cooling capability sharply increases computing power by increasing feasible payload power dissipation by
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two orders of magnitude.
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two orders of magnitude.
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\section{A note on terminology}
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\section{Hardware Security Modules}
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In this thesis, we use the term \emph{Hardware Security Module (HSM)} to refer to a security device that has the
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following three properties.
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\begin{enumerate}
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\item A HSM targets the prevention of any conceivable physical attack. In particular, this includes intrusion attempts
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such as careful drilling or cutting into the device from any direction.
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\item A HSM includes tamper sensors that when triggered result in an active tamper response, usually deleting all
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cryptographic secrets and rendering the device inoperable.
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\item A HSM's tamper sensing and response subsystem is continuously powered from a backup power supply, usually a
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battery. Loss of power triggers the tamper response.
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\end{enumerate}
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This use of the term \emph{HSM} aligns with common usage of the term both in the academic literature and in everyday
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conversation. Particularly the requirement of active tamper detection and response is crucial to distinguish a HSM from
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simpler devices such as TPMs, smart cards or secure enclaves in SoCs. Note that our use of the term HSM is slightly
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different from its use in government standards, from its use in the PCI (card payment industry asscociation) standards,
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and from its industry use.
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In industry, the term HSM is often used for solutions that are only logically segregated and that do not include any
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particular defense against hardware attacks. Our conjecture is that this is a consequence of the standardization
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landscape, where for applications outside of card payment processing the US FIPS
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140-22~\cite{usnationalinstituteofstandardsandtechnologySecurityRequirementsCryptographic2002} standard was central to
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the industry. Despite encompassing both devices that include active tamper detection and response, FIPS 140-2 did not
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draw a distinction in its terminology between the two classes.
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\paragraph{Use in government standards}
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Under US national standard FIPS 140 in in its 2002 version
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2~\cite{usnationalinstituteofstandardsandtechnologySecurityRequirementsCryptographic2002}, a HSM would be called a
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\emph{Multiple-Chip Cryptographic Module} that conforms to the standard's \emph{Security Level 4}. Interesting to note
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are that only security level 4 requires any active tamper detection and response, so its security levels 3 and below do
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not align with our HSM definition. Futher of note is that according to the standard, a single-chip solution does not
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require any tamper detection and response either to meet the standard's security level 4, which is in misalignment with
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our definition. The standard's 2019 updated version FIPS
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140-3~\cite{usnationalinstituteofstandardsandtechnologySecurityRequirementsCryptographic2019} defers to the
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international standards ISO/IEC 19790 and 24759.
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ISO/IEC 19790~\cite{ISOIEC19790} and ISO/IEC 24759~\cite{ISOIEC24759} call what we call a HSM a \emph{Hardware
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Cryptographic Module} corresponding with the standards \emph{Security Level 4}. However, these standards only require
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active tamper detection and response when cryptographic secrets are transmitted in plaintext between chips.
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\paragraph{Use in card payment processing (PCI SSC) standards}
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The Payment Card Industry Security Standards Council (PCI SSC) is an association of credit card network operators that
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defines standards for all layes of card payment processing from card payment terminals in stores through the handling of
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payment data in online shop backend systems.
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PCI SSC terminology aligns with our use and with common everyday use of the term HSM. In PCI SSC terminology, a HSM is a
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crytographic device that has active tamper detecion and response circuitry. However, PCI SSC terminology only differs
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from our use of the term HSM in one nuance: In PCI SSC terminology, a HSM is specifically a datacenter device used for
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backend processing of payment data. The general class of ``hardware devices performing some security function with or
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without particular physical security requirements'' that ISO/IEC 19790 and other standards call a \emph{Hardware
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Cryptographic Module}, in PCI SSC terminology is termed \emph{Secure Cryptographic Device (SCD)} in more recent standard
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versions, which was updated from the previous term \emph{Tamper-Resistant Security Module (TRSM)}. Other than HSMs, PCI
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SSC includes smartcards and card payment terminals in this category. Card payment terminals, referred to as
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\emph{Pin-Entry Device (PED)} in PCI SSC standards, have to include a surprising amount of active tamper detection and
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response functionality including partial coverage of areas like they system's main cryptographic processor and smart
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card reader by battery-backed tamper-sensing meshes.
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\section{Tamper-Sensing Meshes}
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In this thesis, we use the terms \emph{Tamper-Sensing Mesh} and \emph{Security Mesh} synonymous. We use both terms to
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refer to any electrical circuit whose path is laid out to cover a surface with the intent of detecting attempts at
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drilling, cutting or otherwise manipulating this surface. While the term \emph{Security Mesh} is more concise, it is
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less clear to people unfamiliar with the matter. It is also polysemous, and depending on context can also refer to woven
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or stamped metal meshes used as fences or as screens in front of windows to prevent break-in. As a result, it is harder
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to use in online searches, and when using Large Language Models (LLMs), it frequently leads to amusing hallucinations.
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%In the early days of mass-market computing, the expectations towards this new tool were high. Even before people
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%In the early days of mass-market computing, the expectations towards this new tool were high. Even before people
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%realized the potential of computers and the internet for commercial gain, there was widespread optimism about the
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%realized the potential of computers and the internet for commercial gain, there was widespread optimism about the
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11
main.bib
11
main.bib
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@ -4505,7 +4505,6 @@
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author = {{National Institute of Standards and Technology (US)}},
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author = {{National Institute of Standards and Technology (US)}},
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date = {2019},
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date = {2019},
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number = {error: 140-3},
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number = {error: 140-3},
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pages = {error: 140-3},
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institution = {{National Institute of Standards and Technology (U.S.)}},
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institution = {{National Institute of Standards and Technology (U.S.)}},
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location = {Washington, D.C.},
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location = {Washington, D.C.},
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doi = {10.6028/NIST.FIPS.140-3},
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doi = {10.6028/NIST.FIPS.140-3},
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@ -5016,6 +5015,16 @@
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urldate = {2025-04-09}
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urldate = {2025-04-09}
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}
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}
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@standard{pcisecuritystandardscouncilPaymentCardIndustry2025,
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title = {Payment {{Card Industry PIN Transaction Security Device Testing}} and {{Approval Program Guide}}},
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author = {{PCI Security Standards Council}},
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date = {2025-06},
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url = {https://docs-prv.pcisecuritystandards.org/PTS/Supporting%20Document/PTS_Program_Guide_v2.2.pdf},
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urldate = {2025-08-22},
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pagetotal = {75},
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version = {2.2}
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}
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@article{perrigTESLABroadcastAuthentication,
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@article{perrigTESLABroadcastAuthentication,
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title = {The {{TESLA Broadcast Authentication Protocol}}},
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title = {The {{TESLA Broadcast Authentication Protocol}}},
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author = {Perrig, Adrian and Canetti, Ran and Tygar, J D and Song, Dawn},
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author = {Perrig, Adrian and Canetti, Ran and Tygar, J D and Song, Dawn},
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