Karl Palsson
427cdf423b
hw1: notes from assembling first board.
2018-02-20 22:01:22 +00:00
Karl Palsson
02d5cff752
hw1: gitignore gerbers
2018-02-19 21:08:44 +00:00
Karl Palsson
0bf54d8fb8
hw1: notes on signal integrity
2018-02-19 21:07:22 +00:00
Karl Palsson
3b237a5288
hw1: update to current
...
Not really sure, did I forget to checkin after shipping out? Something
got updated after a dot update of kicad? revision control of pcbs and
schematics still sucks hard.
2018-02-19 21:06:16 +00:00
Karl Palsson
eb6139b4fa
hw1: add exampe part number for fx2la part number
2018-02-02 21:03:05 +00:00
Karl Palsson
3ebd1a0619
hw1: use explicit 10103594-0001LF part
...
better fit
2017-12-31 00:02:11 +00:00
Karl Palsson
e5faade848
hw1: commit with filled pours
2017-12-29 02:00:54 +00:00
Karl Palsson
558ad49923
hw1: termination wat
2017-12-29 01:39:58 +00:00
Karl Palsson
6e634937f8
hw1: discover reversed numbering on arduino connectors
...
joy. Fixed now against nucleo64 manuals.
2017-12-29 01:31:12 +00:00
Karl Palsson
edcea804b1
hw1: more silk cleanup
2017-12-29 00:59:05 +00:00
Karl Palsson
f4c629f376
hw1: cleanup silk and start adding labels
2017-12-28 23:31:32 +00:00
Karl Palsson
411cc20856
hw1: shrinking after dropping arduino stuff
2017-12-27 22:31:49 +00:00
Karl Palsson
77ad686a08
hw1: drop arduinno style holes and board shape
...
More to go, nno need for the silk and dead shapes, we just needed the
pin spacings
2017-12-27 17:12:37 +00:00
Karl Palsson
3a90a6e343
hw1: test points, cleanup 3d view
...
Fixed boot0 to be tied down, will be programmed via swd.
Added test points for spare pins where easy
Fixed some footprints to make the 3d view pretty.
2017-12-27 16:20:07 +00:00
Karl Palsson
3137bf4378
new pdf for current schematic
2017-12-17 22:36:34 +00:00
Karl Palsson
b33de16ac9
"fix" grounds by tracks into pour
...
"finish" routing, ignore DRC violations from disconnected usb shield on
pin 6.
Add boot0 jumper pad "just in case" but really kinda dumb, we've got a
debug header on it. Why bother with this?
Change paper size in schema to get more space.
TODO: add silk?
TODO: replace "arduino" shape with just the pinpoints.
2017-12-17 22:28:07 +00:00
Karl Palsson
74b958c599
hw1: continued, just intermediate progress save
...
wtf kicad, why aren't my grounds connected?!
2017-12-11 22:02:56 +00:00
Karl Palsson
afb3081feb
hw1: add crystal, more commentary
...
probably need a crystal for usb :)
still needs footrints, will probably be any old 3225 part.
2017-11-20 23:46:57 +00:00
Karl Palsson
9c78e2ae40
hw1: begin routing.
...
Spun the host, laid most signal tracks.
todo: vcc, ground pour, then shuffle all LA connectors for ease of
routing.
2017-11-19 23:33:38 +00:00
Karl Palsson
c267237013
hw1: apparently _actually_ save the file
2017-11-17 23:21:16 +00:00
Karl Palsson
52238907c3
hw1: add in/out caps to 3v3
2017-11-17 23:14:23 +00:00
Karl Palsson
1dc853bd8b
git ignore more backups
2017-11-17 23:09:34 +00:00
Karl Palsson
3aa65ec998
add "klibs" with new regulator
2017-11-17 23:09:07 +00:00
Karl Palsson
028ebeacbc
gitignore kicad .bak files
2017-11-17 23:01:32 +00:00
Karl Palsson
9994a66a3e
hw1: schematic "finished" ?
...
have I committed enough files for others to even open this?
2017-11-17 23:00:50 +00:00
Karl Palsson
cb376f3959
WIP: hardware test partner round 1
...
Not sure which kicad files are necessary and which are local yet!
Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st
board, giving access to test:
* DAC->ADC (both directions)
* I2C (both directions)
* SPI (both directions)
* Uart (both directions)
a socket for a cheap fx2 based logic analyser will be included, so that
sigrok can be used to capture tests of the actual line states.
2017-10-07 15:20:00 +00:00
