olsndot/hw1
2017-12-31 00:02:11 +00:00
..
Socket_Arduino_Uno.3dshapes WIP: hardware test partner round 1 2017-10-07 15:20:00 +00:00
Socket_Arduino_Uno.pretty WIP: hardware test partner round 1 2017-10-07 15:20:00 +00:00
.gitignore git ignore more backups 2017-11-17 23:09:34 +00:00
cubemx-pin-selector.ioc WIP: hardware test partner round 1 2017-10-07 15:20:00 +00:00
hw1-cache.lib WIP: hardware test partner round 1 2017-10-07 15:20:00 +00:00
hw1-rescue.lib WIP: hardware test partner round 1 2017-10-07 15:20:00 +00:00
hw1.cmp WIP: hardware test partner round 1 2017-10-07 15:20:00 +00:00
hw1.csv WIP: hardware test partner round 1 2017-10-07 15:20:00 +00:00
hw1.kicad_pcb hw1: use explicit 10103594-0001LF part 2017-12-31 00:02:11 +00:00
hw1.net hw1: use explicit 10103594-0001LF part 2017-12-31 00:02:11 +00:00
hw1.pdf hw1: test points, cleanup 3d view 2017-12-27 16:20:07 +00:00
hw1.plt WIP: hardware test partner round 1 2017-10-07 15:20:00 +00:00
hw1.pro hw1: test points, cleanup 3d view 2017-12-27 16:20:07 +00:00
hw1.sch hw1: use explicit 10103594-0001LF part 2017-12-31 00:02:11 +00:00
hw1.xml WIP: hardware test partner round 1 2017-10-07 15:20:00 +00:00
karlp-klibs.dcm add "klibs" with new regulator 2017-11-17 23:09:07 +00:00
karlp-klibs.lib add "klibs" with new regulator 2017-11-17 23:09:07 +00:00
README hw1: add crystal, more commentary 2017-11-20 23:46:57 +00:00

This is a board designed to receive nucleo64 (and maybe 32) boards
to be test TARGETS.  The stm32l1 on _this_ board is reprogrammed via
one of the debug connectors, with appropriate software to be
master/slave/etc to correspond with the DUT.  All (most) communication
lines between the two boards are tapped to a 10 pin connector matching
cheap FX2based logic analysers, allowing automatic tests to be written
that use sigrok to check that the signals on the wire match expectations.


TODO:
Check i2c conns to target board! (drop the unused one!)
VCC routing (and recommended mic5504 routing)
ground pours in kicad
reshuffle LA conn
gerber generation?