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More logic works now

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jaseg 2019-07-06 15:37:36 +09:00
parent 4491f72afd
commit 2a6ce07104
2 changed files with 62 additions and 23 deletions
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1
Makefile
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@ -37,6 +37,7 @@ LIBS =
#LIBS += -lrdimon
CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000 -DLSE_VALUE=32768
CFLAGS += -DCOMPILE_TIME=$(shell date +%s) -DTARGET_DATE=$(shell date -d 'Aug 17 00:00:00 CEST 2019' +%s)
LDFLAGS += -Tstm32_flash.ld
CFLAGS += -I$(CMSIS_DEV_PATH)/Include -I$(CMSIS_PATH)/Include -I$(HAL_PATH)/Inc -Iconfig -Wno-unused -I../common

84
main.c
View file

@ -17,8 +17,11 @@
#include "global.h"
#define RTC_INITIALIZED_REGISTER BKP->DR1
#define RTC_INITIALIZED_FLAG 1
#define RTC_INITIALIZED_REGISTER_HIGH BKP->DR1
#define RTC_INITIALIZED_REGISTER_LOW BKP->DR2
#define REBOOT_REGISTER BKP->DR3
#define DAY_SECONDS (24*3600)
uint32_t pcg32_random_r() {
// *Really* minimal PCG32 code / (c) 2014 M.E. O'Neill / pcg-random.org
@ -66,10 +69,15 @@ void rtc_alarm_reset(void) {
void rtc_init(void) {
rtc_bus_sync();
RTC->CRH = 0;
if (!(RTC_INITIALIZED_REGISTER & RTC_INITIALIZED_FLAG)) {
if (((RTC_INITIALIZED_REGISTER_HIGH<<16) | RTC_INITIALIZED_REGISTER_LOW) != COMPILE_TIME) {
RCC->BDCR = RCC_BDCR_RTCEN | (1<<RCC_BDCR_RTCSEL_Pos) | RCC_BDCR_LSEON;
while (!(RCC->BDCR & RCC_BDCR_LSERDY)) ;
rtc_write(&RTC->PRLH, 32768-1);
rtc_write(&RTC->CNTH, 0);
RTC_INITIALIZED_REGISTER = RTC_INITIALIZED_FLAG;
rtc_write(&RTC->CNTH, COMPILE_TIME);
RTC_INITIALIZED_REGISTER_HIGH = COMPILE_TIME>>16;
RTC_INITIALIZED_REGISTER_LOW = COMPILE_TIME&0xffff;
REBOOT_REGISTER = 0;
}
}
@ -77,41 +85,71 @@ void rtc_set_alarm_sec(uint32_t value) {
rtc_write(&RTC->ALRH, value);
}
uint32_t rtc_time(void) {
return RTC->CNTH<<16 | RTC->CNTL;
}
void rtc_set_alarm_rel_sec(uint32_t value) {
uint32_t now = RTC->CNTH<<16 | RTC->CNTL;
rtc_set_alarm_sec(now + value);
rtc_set_alarm_sec(rtc_time() + value);
}
void switch_output_enable() {
uint32_t now = rtc_time();
if (now/300 % 24 == 0)
GPIOC->ODR |= 1<<14;
else
GPIOC->ODR &= ~(1<<14);
}
void switch_output_disable() {
GPIOC->ODR &= ~(1<<14);
}
int main(void){
/* We're starting out from HSI@8MHz */
SystemCoreClockUpdate();
SCB->SCR &= (~SCB_SCR_SLEEPONEXIT_Msk) & SCB_SCR_SLEEPDEEP_Msk; /* Disable for now */
for (int i=0; i<1000000; i++) /* about 5s */
for (int i=0; i<50000; i++)
asm volatile ("nop");
/* Turn on lots of neat things */
RCC->APB2ENR |= RCC_APB2ENR_IOPCEN;
RCC->APB1ENR |= RCC_APB1ENR_BKPEN | RCC_APB1ENR_PWREN;
PWR->CR = PWR_CR_PDDS | PWR_CR_DBP;
RCC->BDCR = RCC_BDCR_RTCEN | (1<<RCC_BDCR_RTCSEL_Pos) | RCC_BDCR_LSEON;
while (!(RCC->BDCR & RCC_BDCR_LSERDY)) ;
GPIOC->CRH |=
(0<<GPIO_CRH_CNF13_Pos) | (2<<GPIO_CRH_MODE13_Pos); /* PC13 - LED */
GPIOC->ODR |= 1<<13;
rtc_init();
rtc_set_alarm_rel_sec(2);
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; /* Use deep sleep mode */
GPIOC->ODR &= ~(1<<13);
for (int i=0; i<100000; i++)
asm volatile ("nop");
GPIOC->CRH |=
(0<<GPIO_CRH_CNF13_Pos) | (2<<GPIO_CRH_MODE13_Pos)| /* PC13 - LED */
(0<<GPIO_CRH_CNF14_Pos) | (2<<GPIO_CRH_MODE14_Pos); /* PC14 - MOSFET */
GPIOC->ODR |= 1<<13;
GPIOC->ODR &= ~(1<<14);
rtc_init();
rtc_alarm_reset();
rtc_set_alarm_rel_sec(0);
if (!(PWR->CSR & PWR_CSR_WUF)) /* This reset wasn't caused by the RTC alarm */
REBOOT_REGISTER++;
if (REBOOT_REGISTER > 1) { /* We have rebooted since initial bring-up */
/* Give status indication and active output as fail-safe */
GPIOC->ODR &= ~(1<<13);
for (int i=0; i<5000; i++)
asm volatile ("nop");
GPIOC->ODR |= 1<<13;
switch_output_enable();
} else {
uint32_t now = rtc_time();
if (now >= TARGET_DATE - (DAY_SECONDS*24) && now < TARGET_DATE)
switch_output_enable();
else
switch_output_disable();
}
PWR->CR |= PWR_CR_CWUF;
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("wfe");
return 42;
}