Commit graph

89 commits

Author SHA1 Message Date
jaseg
37338e2ad8 Fix firmware dsss decoding bug
This is my #1 top dumbest bug like ever
2020-03-18 20:35:15 +01:00
jaseg
639a4d1386 Fix up linkmem script 2020-03-18 15:34:35 +01:00
jaseg
583d6fec80 notebooks: add some missing data 2020-03-18 13:03:31 +01:00
jaseg
13bd8d0f2d Improve detector 2020-03-18 12:59:22 +01:00
jaseg
4c7c927f3c Improve frequency measurement error detection 2020-03-18 12:58:55 +01:00
jaseg
80de5c2e24 Debugging signal capture subsystem 2020-03-17 17:20:43 +01:00
jaseg
9d72724ca5 Remove incorrect license header 2020-03-16 19:19:47 +01:00
jaseg
a1dc923315 Fix serial 2020-03-16 19:19:34 +01:00
jaseg
fed186a49f Add end-to-end simulation 2020-03-15 14:47:25 +01:00
jaseg
0e8a0d6f78 Fixup clock config 2020-03-14 15:12:07 +01:00
jaseg
1b7ae0aeef having problems with dma m2m mode 2020-03-13 18:19:02 +01:00
jaseg
838eb6b26e linkmem: add subdir size contribution calculation 2020-03-13 13:52:00 +01:00
jaseg
43d210a1a0 Fix data symbol handling 2020-03-13 13:44:36 +01:00
jaseg
ec6e273a30 Prettify linkmap output 2020-03-13 12:59:30 +01:00
jaseg
9a220b6878 linkmem: Add subdir highlighting 2020-03-13 12:39:11 +01:00
jaseg
edde28594f prettify linkmem 2020-03-13 11:48:43 +01:00
jaseg
bf7e8701c7 Add size tracing tool 2020-03-12 21:59:45 +01:00
jaseg
03e8443e2e Prettify makefile 2020-03-11 14:02:22 +01:00
jaseg
0af1a534e2 Start with integration of everything 2020-03-11 13:57:22 +01:00
jaseg
0cd07d397f Crypto v2 draft working 2020-03-10 12:20:55 +01:00
jaseg
6880468862 WIP cryptographic design 2020-03-09 22:10:46 +01:00
jaseg
b0a5232487 Fix a bunch of compiler warnings 2020-03-09 14:18:09 +01:00
jaseg
5997a24fcb DSSS sequence matcher works 2020-03-09 13:53:56 +01:00
jaseg
000ced2b54 foo 2020-03-09 13:47:08 +01:00
jaseg
9debe084fc demod wip 2020-03-09 13:23:35 +01:00
jaseg
b4d5293d04 decoding WIP 2020-03-09 10:17:14 +01:00
jaseg
55ebbcbdbc Finish DSSS demodulation stage 1 2020-03-06 12:39:21 +01:00
jaseg
e4693349cf Correlator seems to be working 2020-03-06 11:54:33 +01:00
jaseg
ad9e17c35c WIP DSSS decoding 2020-03-06 11:09:35 +01:00
jaseg
4b419bd1ad Working on DSSS demodulator sim 2020-03-05 19:15:28 +01:00
jaseg
d9b26d16c0 Fix frequency measurement simulation 2020-03-04 17:10:31 +01:00
jaseg
4d80111cad wip 2020-03-03 18:05:45 +01:00
jaseg
33e99ed37f working on testing 2020-03-03 12:51:48 +01:00
jaseg
87344f4513 cmsis: fix exporting of fft symbols 2020-03-03 11:45:45 +01:00
jaseg
d493d9e99c foo 2020-03-02 19:45:47 +01:00
jaseg
331ce442c4 foo 2020-03-02 19:45:39 +01:00
jaseg
d678ae5fbe foo 2020-03-02 19:44:11 +01:00
jaseg
ca01d52a86 Finishing up freq meas 2020-03-02 19:42:36 +01:00
jaseg
5effadcbaf LDPC decoder fully working 2020-02-28 19:30:27 +01:00
jaseg
89b32316aa embedded ldpc decoder 50% working 2020-02-28 18:29:41 +01:00
jaseg
9cf1fee2e9 ldpc decoder: wip 2020-02-28 12:59:25 +01:00
jaseg
f6061fe574 Add missing files 2020-02-27 16:02:41 +01:00
jaseg
43ff9fdac0 Build working 2020-02-27 15:59:22 +01:00
jaseg
621f66ff6e MUSL experiments 2020-02-27 15:02:12 +01:00
jaseg
b489a1b12f Add a bunch of deps 2020-02-27 14:39:18 +01:00
jaseg
fcbdab4ab2 demo: SPI Flash interface working 2020-02-26 13:40:37 +01:00
jaseg
2964bda23c Add beginnings of a SPI flash driver 2020-02-25 18:05:14 +01:00
jaseg
031380141d controller-fw: initial jtag programming draft 2020-02-24 20:19:40 +01:00
jaseg
23a1333abe Initial reset controller firmware 2020-02-24 19:14:10 +01:00
jaseg
b519674935 Add cryptography experiments nb 2020-02-21 15:18:36 +00:00