Fix rotor_base NRST and testpoint situation
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jaseg
parent
872ac8e309
commit
426bca9ac3
4 changed files with 8607 additions and 7393 deletions
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@ -1,7 +1,7 @@
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{
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"board": {
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"active_layer": 0,
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"active_layer_preset": "",
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"active_layer_preset": "All Layers",
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"hidden_nets": [],
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"high_contrast_mode": 0,
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"net_color_mode": 1,
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@ -60,7 +60,7 @@
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36,
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37
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],
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"visible_layers": "007ffff_ffffffff"
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"visible_layers": "fffffff_ffffffff"
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},
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"meta": {
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"filename": "rotor_base_pcb.kicad_prl",
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@ -62,7 +62,7 @@
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"copper_edge_clearance": "error",
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"copper_edge_clearance": "warning",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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@ -109,22 +109,22 @@
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.19999999999999998,
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"min_track_width": 0.09999999999999999,
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"min_via_annular_width": 0.049999999999999996,
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"min_via_annulus": 0.049999999999999996,
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"min_via_diameter": 0.39999999999999997,
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"solder_mask_clearance": 0.0,
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"solder_mask_min_width": 0.0,
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"solder_paste_clearance": 0.0,
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"solder_paste_margin_ratio": 0.0
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"solder_paste_margin_ratio": -0.0
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},
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"track_widths": [
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0.25
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0.13
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],
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"via_dimensions": [
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{
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"diameter": 0.8,
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"drill": 0.4
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"diameter": 0.6,
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"drill": 0.3
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}
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],
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"zones_allow_external_fillets": false,
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@ -136,6 +136,178 @@
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"cvpcb": {
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"equivalence_files": []
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},
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"erc": {
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"meta": {
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"version": 0
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},
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"pin_map": [
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[
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0,
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0,
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0,
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0,
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0,
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1,
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0,
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0,
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0,
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0,
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2
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],
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[
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0,
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2,
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0,
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1,
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0,
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1,
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0,
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2,
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2,
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2,
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2
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],
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[
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0,
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0,
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0,
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||||
0,
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||||
0,
|
||||
1,
|
||||
0,
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||||
1,
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||||
0,
|
||||
1,
|
||||
2
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||||
],
|
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[
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0,
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||||
1,
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||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
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1,
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2,
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1,
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1,
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2
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],
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[
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0,
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0,
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0,
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0,
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||||
0,
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||||
1,
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||||
0,
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0,
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0,
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0,
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2
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],
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[
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1,
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1,
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1,
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1,
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1,
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1,
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1,
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1,
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1,
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1,
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2
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],
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[
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0,
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0,
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0,
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1,
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0,
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1,
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0,
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0,
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0,
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0,
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2
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],
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[
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0,
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2,
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1,
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2,
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0,
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1,
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0,
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2,
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2,
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2,
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2
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],
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[
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0,
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2,
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0,
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1,
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0,
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1,
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0,
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2,
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0,
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0,
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2
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],
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[
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0,
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2,
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1,
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1,
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0,
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1,
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0,
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2,
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0,
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0,
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2
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],
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[
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2,
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2,
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2,
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2,
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2,
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2,
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2,
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2,
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2,
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2,
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2
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]
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],
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"rule_severities": {
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"bus_definition_conflict": "error",
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"bus_label_syntax": "error",
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"bus_to_bus_conflict": "error",
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"bus_to_net_conflict": "error",
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"different_unit_footprint": "error",
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"different_unit_net": "error",
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"duplicate_sheet_names": "error",
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"global_label_dangling": "error",
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"hier_label_mismatch": "error",
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"label_dangling": "error",
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"multiple_net_names": "error",
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"net_not_bus_member": "error",
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"no_connect_connected": "error",
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"no_connect_dangling": "error",
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"pin_not_connected": "error",
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"pin_not_driven": "error",
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"pin_to_pin": "warning",
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"similar_labels": "error",
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"unresolved_variable": "error",
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"wire_dangling": "error"
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}
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},
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"libraries": {
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"pinned_footprint_libs": [],
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"pinned_symbol_libs": []
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@ -158,9 +330,9 @@
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"name": "Default",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.25,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"track_width": 0.13,
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"via_diameter": 0.6,
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"via_drill": 0.3,
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"wire_width": 6.0
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}
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],
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@ -182,9 +354,38 @@
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"page_layout_descr_file": ""
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},
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"schematic": {
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"drawing": {
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"default_bus_thickness": 12.0,
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"default_junction_size": 40.0,
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"default_line_thickness": 6.0,
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"default_text_size": 50.0,
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"default_wire_thickness": 6.0,
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"field_names": [],
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"intersheets_ref_prefix": "",
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"intersheets_ref_short": false,
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"intersheets_ref_show": false,
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"intersheets_ref_suffix": "",
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"pin_symbol_size": 25.0,
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"text_offset_ratio": 0.3
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},
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"legacy_lib_dir": "",
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"legacy_lib_list": []
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"legacy_lib_list": [],
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"meta": {
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"version": 0
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},
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"net_format_name": "",
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"page_layout_descr_file": "",
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"plot_directory": "",
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"spice_adjust_passive_values": false,
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"spice_external_command": "spice \"%I\"",
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"subpart_first_id": 65,
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"subpart_id_separator": 0
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},
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"sheets": [],
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"sheets": [
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[
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"881f0a59-93e4-4241-a0ea-e6b94814f101",
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""
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]
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],
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"text_variables": {}
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}
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