Add meshes to PCBs

This commit is contained in:
jaseg 2020-10-09 18:06:31 +02:00
parent cf913a1eab
commit 872ac8e309
25 changed files with 139442 additions and 76464 deletions

3
prototype/mech_pcbs/.gitignore vendored Normal file
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@ -0,0 +1,3 @@
*/gerber
*/*_with_mesh.kicad_pro
*/*_with_mesh.kicad_prl

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{"mesh_angle": 0.0, "trace_width": 0.25, "space_width": 0.25, "edge_clearance": 1.5, "anchor_exit": 0.0, "anchor": "J1", "num_traces": 2, "offset_x": 0.0, "offset_y": 0.0, "chamfer": 0.5, "target_layer_id": 31, "mask_layer_id": 42, "random_seed": null, "randomness": 0.25, "kimesh_settings_version": "1.0.0"}

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@ -1,6 +1,6 @@
{
"board": {
"active_layer": 0,
"active_layer": 42,
"active_layer_preset": "",
"hidden_nets": [],
"high_contrast_mode": 0,

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@ -1,29 +1 @@
6406214189856
common_footprints
8mm_base
0
16
16
common_footprints
8mm_plug
0
16
16
common_footprints
15mm_base
0
20
20
common_footprints
15mm_plug
0
20
20

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{"mesh_angle": 0.0, "trace_width": 0.25, "space_width": 0.25, "edge_clearance": 1.5, "anchor_exit": 90.0, "anchor": "J1", "num_traces": 2, "offset_x": 0.0, "offset_y": 0.0, "chamfer": 0.5, "target_layer_id": 0, "mask_layer_id": 42, "random_seed": null, "randomness": 0.25, "kimesh_settings_version": "1.0.0"}

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@ -39,6 +39,7 @@
(svguseinch false)
(svgprecision 6)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
@ -262,6 +263,20 @@
(net 1 "Net-(J1-Pad16)") (solder_mask_margin 0.1) (tstamp 8816a68e-89a6-42fe-8caa-bda1937524ef))
)
(gr_poly (pts
(xy 200 61)
(xy 189 67)
(xy 198 82)
(xy 210 75)
(xy 210 160)
(xy 90 160)
(xy 90 90)
(xy 91 77)
(xy 102 82)
(xy 111 67)
(xy 95 60)
(xy 95 40)
(xy 177 39)) (layer "Eco1.User") (width 0.1) (tstamp 9eb5260b-7f86-4f68-8591-70027bad8ee3))
(gr_line (start 99.949 75.091) (end 103.403 69.109) (angle 90) (layer "Edge.Cuts") (width 0.16) (tstamp 037575b2-a072-4db2-adad-adde48bad8d3))
(gr_line (start 199.412 76.091) (end 199.851 75.837) (angle 90) (layer "Edge.Cuts") (width 0.16) (tstamp 0f6aa767-2d62-4d79-bcc0-071a43fc4b2f))
(gr_circle (center 138 100) (end 136.4 100) (layer "Edge.Cuts") (width 0.16) (tstamp 24c76efc-fa73-4315-9872-d3a1650190eb))

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@ -1,6 +1,6 @@
{
"board": {
"active_layer": 31,
"active_layer": 42,
"active_layer_preset": "",
"hidden_nets": [],
"high_contrast_mode": 0,

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{"mesh_angle": 0.0, "trace_width": 0.25, "space_width": 0.25, "edge_clearance": 1.5, "anchor_exit": 45.0, "anchor": "J1", "num_traces": 2, "offset_x": 0.0, "offset_y": 1.1, "chamfer": 0.5, "target_layer_id": 0, "mask_layer_id": 42, "random_seed": null, "randomness": 0.25, "kimesh_settings_version": "1.0.0"}

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@ -52,6 +52,7 @@
(svguseinch false)
(svgprecision 6)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
@ -284,6 +285,11 @@
(net 14 "/tru_t4") (tstamp 0b2349ca-e556-4a69-86fd-7663c8e0b979))
)
(gr_poly (pts
(xy 160 172.5)
(xy 140 172.5)
(xy 140 25)
(xy 160 25)) (layer "Eco1.User") (width 0.1) (tstamp 724fb27a-5098-4877-ae90-10c30d528453))
(gr_line (start 146 18.5) (end 154 18.5) (angle 90) (layer "Edge.Cuts") (width 0.16) (tstamp 21d71c90-1663-47f2-805a-3a10bb7166bc))
(gr_line (start 142.5 182.1) (end 146 182.1) (angle 90) (layer "Edge.Cuts") (width 0.16) (tstamp 34598794-23ad-45c5-a437-a984c0ab605a))
(gr_line (start 154 18.5) (end 154 22.1) (angle 90) (layer "Edge.Cuts") (width 0.16) (tstamp 3547d435-8af2-4e43-ac75-cfb0f21102eb))

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@ -1,6 +1,6 @@
{
"board": {
"active_layer": 0,
"active_layer": 42,
"active_layer_preset": "",
"hidden_nets": [],
"high_contrast_mode": 0,

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(fp_lib_table
(lib (name "common_footprints")(type "KiCad")(uri "/home/user/research/rotohsm/prototype/mech_pcbs/common/common_footprints.pretty")(options "")(descr ""))
)

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@ -4,6 +4,14 @@
"active_layer_preset": "",
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
"zones": 0.6
},
"ratsnest_display_mode": 0,
"selection_filter": {
"dimensions": true,
"footprints": true,
@ -52,12 +60,17 @@
32,
33,
34,
35
35,
36,
37
],
"visible_layers": "7ffff_ffffffff"
"visible_layers": "007ffff_ffffffff"
},
"meta": {
"filename": "stator_base_pcb.kicad_prl",
"version": 1
"version": 2
},
"project": {
"files": []
}
}

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@ -12,6 +12,14 @@
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 1,
"dimension_units": 0,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
@ -49,38 +57,45 @@
],
"drc_exclusions": [],
"meta": {
"version": 0
"version": 1
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_too_small": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"keepout": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_too_small": "error",
"microvia_too_small": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "error",
"silk_overlap": "error",
"skew_out_of_range": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_annulus": "error",
"via_dangling": "warning",
"via_hole_larger_than_pad": "error",
"via_too_small": "error",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
@ -95,6 +110,7 @@
"min_microvia_drill": 0.09999999999999999,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_annulus": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
@ -111,6 +127,7 @@
"drill": 0.4
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": false
},
"layer_presets": []
@ -119,6 +136,179 @@
"cvpcb": {
"equivalence_files": []
},
"erc": {
"meta": {
"version": 0
},
"pin_map": [
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0,
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],
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[
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],
"rule_severities": {
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"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_sheet_names": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "error",
"no_connect_dangling": "error",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"similar_labels": "warning",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
@ -139,6 +329,8 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
@ -157,14 +349,44 @@
"netlist": "",
"specctra_dsn": "",
"step": "",
"vmrl": ""
"vmrl": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"drawing": {
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"default_junction_size": 40.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"default_wire_thickness": 6.0,
"field_names": [],
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"pin_symbol_size": 25.0,
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"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
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},
"sheets": [],
"sheets": [
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(sym_lib_table
(lib (name "common_symbols")(type "KiCad")(uri "/home/user/research/rotohsm/prototype/mech_pcbs/common/common_symbols.kicad_sym")(options "")(descr ""))
)