Driver Filter WIP

This commit is contained in:
jaseg 2023-05-25 22:23:09 +02:00
parent f74d787c99
commit fec02919c3
22 changed files with 231651 additions and 231026 deletions

View file

@ -3,10 +3,12 @@
"active_layer": 0,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,

View file

@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.15,
@ -58,18 +59,8 @@
"drc_exclusions": [
"clearance|180095001|115440000|46b665bc-ec0c-494f-bc83-df770871abd3|bcb40fa3-b41b-411d-b561-9bd80d99e072",
"clearance|180850000|115440000|bcb40fa3-b41b-411d-b561-9bd80d99e072|46b665bc-ec0c-494f-bc83-df770871abd3",
"clearance|180850000|115440000|e6629e01-bc20-4ee6-b773-723f548b3816|bcb40fa3-b41b-411d-b561-9bd80d99e072",
"courtyards_overlap|195765866|108222151|00000000-0000-0000-0000-00005de7bda7|00000000-0000-0000-0000-00005de9b522",
"text_thickness|193350000|117925000|e1e8791b-f102-4509-9948-1986c49e1265|00000000-0000-0000-0000-000000000000",
"text_thickness|194150000|82775000|d9972955-3442-4947-bb4c-b7565fbe6bb7|00000000-0000-0000-0000-000000000000",
"track_dangling|160600000|94125000|265873b1-486e-477a-b6cf-ce1300359272|00000000-0000-0000-0000-000000000000",
"track_dangling|168700000|86225000|1b7d2820-9357-474d-8097-03ccbdacd975|00000000-0000-0000-0000-000000000000",
"track_dangling|168700000|86225000|d339ecce-3fd9-4e97-96f1-611260cda1c4|00000000-0000-0000-0000-000000000000",
"track_dangling|174325000|115225000|f1872d20-0bb0-4746-b8b5-e9be9708c74c|00000000-0000-0000-0000-000000000000",
"track_dangling|177400000|77400000|12b87ea1-4c32-4148-a860-bc0c28c9a20b|00000000-0000-0000-0000-000000000000",
"track_dangling|179362500|82312500|f8ba382a-588f-4da9-b278-dfa04215c18f|00000000-0000-0000-0000-000000000000",
"track_dangling|182975000|75575000|3ffd4088-d618-4ea4-bb0d-96c1f0c66d24|00000000-0000-0000-0000-000000000000",
"track_dangling|186857500|77625000|cc9ece8d-547f-40b0-add3-a0bd3d50fd8a|00000000-0000-0000-0000-000000000000"
"text_thickness|193350000|117925000|e1e8791b-f102-4509-9948-1986c49e1265|00000000-0000-0000-0000-000000000000"
],
"meta": {
"filename": "board_design_settings.json",
@ -78,6 +69,7 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
@ -86,6 +78,7 @@
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
@ -129,6 +122,7 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.01,
"min_hole_clearance": 0.0,
"min_hole_to_hole": 0.25,
@ -455,7 +449,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -469,10 +463,10 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.6,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -481,27 +475,49 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "HV",
"nets": [
"+VSW",
"/Q0",
"/Q1",
"/Q2",
"/Q3",
"/VIN_A",
"/VIN_B"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "HV",
"pattern": "+VSW"
},
{
"netclass": "HV",
"pattern": "/Q0"
},
{
"netclass": "HV",
"pattern": "/Q1"
},
{
"netclass": "HV",
"pattern": "/Q2"
},
{
"netclass": "HV",
"pattern": "/Q3"
},
{
"netclass": "HV",
"pattern": "/VIN_A"
},
{
"netclass": "HV",
"pattern": "/VIN_B"
}
]
},
"pcbnew": {
"last_paths": {

File diff suppressed because it is too large Load diff

View file

@ -3,10 +3,12 @@
"active_layer": 0,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,

View file

@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.15,
@ -56,20 +57,8 @@
}
],
"drc_exclusions": [
"clearance|180095001|115440000|46b665bc-ec0c-494f-bc83-df770871abd3|bcb40fa3-b41b-411d-b561-9bd80d99e072",
"clearance|180850000|115440000|bcb40fa3-b41b-411d-b561-9bd80d99e072|46b665bc-ec0c-494f-bc83-df770871abd3",
"clearance|180850000|115440000|e6629e01-bc20-4ee6-b773-723f548b3816|bcb40fa3-b41b-411d-b561-9bd80d99e072",
"courtyards_overlap|195765866|108222151|00000000-0000-0000-0000-00005de7bda7|00000000-0000-0000-0000-00005de9b522",
"text_thickness|193350000|117925000|e1e8791b-f102-4509-9948-1986c49e1265|00000000-0000-0000-0000-000000000000",
"text_thickness|194150000|82775000|d9972955-3442-4947-bb4c-b7565fbe6bb7|00000000-0000-0000-0000-000000000000",
"track_dangling|160600000|94125000|265873b1-486e-477a-b6cf-ce1300359272|00000000-0000-0000-0000-000000000000",
"track_dangling|168700000|86225000|1b7d2820-9357-474d-8097-03ccbdacd975|00000000-0000-0000-0000-000000000000",
"track_dangling|168700000|86225000|d339ecce-3fd9-4e97-96f1-611260cda1c4|00000000-0000-0000-0000-000000000000",
"track_dangling|174325000|115225000|f1872d20-0bb0-4746-b8b5-e9be9708c74c|00000000-0000-0000-0000-000000000000",
"track_dangling|177400000|77400000|12b87ea1-4c32-4148-a860-bc0c28c9a20b|00000000-0000-0000-0000-000000000000",
"track_dangling|179362500|82312500|f8ba382a-588f-4da9-b278-dfa04215c18f|00000000-0000-0000-0000-000000000000",
"track_dangling|182975000|75575000|3ffd4088-d618-4ea4-bb0d-96c1f0c66d24|00000000-0000-0000-0000-000000000000",
"track_dangling|186857500|77625000|cc9ece8d-547f-40b0-add3-a0bd3d50fd8a|00000000-0000-0000-0000-000000000000"
"text_thickness|194150000|82775000|d9972955-3442-4947-bb4c-b7565fbe6bb7|00000000-0000-0000-0000-000000000000"
],
"meta": {
"filename": "board_design_settings.json",
@ -78,6 +67,7 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
@ -86,6 +76,7 @@
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
@ -129,6 +120,7 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.01,
"min_hole_clearance": 0.0,
"min_hole_to_hole": 0.25,
@ -455,7 +447,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -469,10 +461,10 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.6,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -481,24 +473,37 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "HV",
"nets": [
"/Q0",
"/Q1",
"/Q2",
"/Q3"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "HV",
"pattern": "/Q0"
},
{
"netclass": "HV",
"pattern": "/Q1"
},
{
"netclass": "HV",
"pattern": "/Q2"
},
{
"netclass": "HV",
"pattern": "/Q3"
}
]
},
"pcbnew": {
"last_paths": {

File diff suppressed because it is too large Load diff

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@ -3,10 +3,12 @@
"active_layer": 0,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,

View file

@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.15,
@ -455,7 +456,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -469,10 +470,10 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.6,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -481,27 +482,49 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "HV",
"nets": [
"+VSW",
"/Q0",
"/Q1",
"/Q2",
"/Q3",
"/VIN_A",
"/VIN_B"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "HV",
"pattern": "+VSW"
},
{
"netclass": "HV",
"pattern": "/Q0"
},
{
"netclass": "HV",
"pattern": "/Q1"
},
{
"netclass": "HV",
"pattern": "/Q2"
},
{
"netclass": "HV",
"pattern": "/Q3"
},
{
"netclass": "HV",
"pattern": "/VIN_A"
},
{
"netclass": "HV",
"pattern": "/VIN_B"
}
]
},
"pcbnew": {
"last_paths": {

View file

@ -14,7 +14,7 @@
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
CUBE_PATH ?= $(wildcard ~)/ref/stm32cube/STM32CubeF0
CUBE_PATH ?= $(wildcard ~)/ref/STM32CubeF0
CMSIS_PATH ?= $(CUBE_PATH)/Drivers/CMSIS
CMSIS_DEV_PATH ?= $(CMSIS_PATH)/Device/ST/STM32F0xx
HAL_PATH ?= $(CUBE_PATH)/Drivers/STM32F0xx_HAL_Driver
@ -79,7 +79,7 @@ sources.tar.xz.zip: sources.tar.xz
sources.c: sources.tar.xz.zip
xxd -i $< | head -n -1 | sed 's/=/__attribute__((section(".source_tarball"))) =/' > $@
main.elf: main.c startup_stm32f030x6.s system_stm32f0xx.c $(HAL_PATH)/Src/stm32f0xx_ll_utils.c base.c cmsis_exports.c ../common/8b10b.c adc.c protocol.c 8seg_protocol.c transmit.c
main.elf: main.c startup_stm32f030x6.s system_stm32f0xx.c base.c
$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS)
$(OBJCOPY) -O ihex $@ $(@:.elf=.hex)
$(OBJCOPY) -O binary $@ $(@:.elf=.bin)
@ -89,15 +89,6 @@ main.elf: main.c startup_stm32f030x6.s system_stm32f0xx.c $(HAL_PATH)/Src/stm32f
program: main.elf openocd.cfg
openocd -f openocd.cfg -c "program $< verify reset exit"
8b10b_test_encode: 8b10b_test_encode.c 8b10b.c
gcc -o $@ $^
8b10b_test_decode: 8b10b_test_decode.c 8b10b.c
gcc -o $@ $^
protocol_test: protocol.c protocol_test.c
gcc -o $@ -O0 -Wall -Wextra -g -I../common $^
clean:
rm -f **.o
rm -f main.elf main.hex main.bin main.map main.lst

View file

@ -17,113 +17,6 @@
#include "global.h"
#include "adc.h"
#include "8seg_protocol.h"
#include "transmit.h"
volatile unsigned int sys_time = 0;
volatile unsigned int sys_time_seconds = 0;
uint16_t jitter_meas_avg_ns = 0;
void TIM1_BRK_UP_TRG_COM_Handler() {
TIM1->SR &= ~TIM_SR_UIF_Msk;
}
void set_drv_gpios(uint8_t val) {
val = ~val;
int a=!(val&1), b=!(val&2), c=!(val&4), d=!(val&8);
GPIOA->BSRR = (((!a)<<3 | (!b)<<7 | (!c)<<6 | (!d)<<4)<<16) | ((a<<3) | (b<<7) | (c<<6) | (d<<4));
}
uint8_t out_state = 0x0f;
void set_outputs(uint8_t val[8]) {
/* TODO implement BCM for digital brightness control */
int x = 0;
for (int i=0; i<8; i++)
if (val[i] > 127)
x |= 1<<i;
out_state = x;
}
void set_outputs_binary(int mask, int global_brightness) {
uint8_t val[8];
for (int i=0; i<8; i++)
val[i] = (mask & (1<<i)) ? global_brightness : 0;
set_outputs(val);
}
void set_load(bool load) {
GPIOA->BSRR = (1<<2) << (load ? 0 : 16);
}
void blank(void) {
GPIOA->BRR = (1<<9) | (1<<10);
set_drv_gpios(0);
}
bool has_sync = 0;
void unblank_low(int bit) {
if (backchannel_frame) { /* Set from protocol.c */
if (tx_next_bit() == 1)
set_load(1);
else /* 0; but also TX_IDLE */
set_load(0);
} else if (has_sync) {
if (bit) {
//GPIOA->BSRR = (1<<10);
set_drv_gpios(out_state & 0xf);
} else {
//GPIOA->BSRR = (1<<9);
set_drv_gpios(out_state >> 4);
}
}
}
int sync_ctr = 0xffff;
void TIM3_IRQHandler(void) {
if (TIM3->SR & TIM_SR_CC2IF) {
if (sync_ctr > 10)
has_sync = 0;
else
sync_ctr += 1;
EXTI->IMR = (1<<0);
GPIOB->BSRR = (1<<1);
GPIOA->BRR = (1<<9) | (1<<10);
} else if (TIM3->SR & TIM_SR_CC3IF) {
int bit = GPIOA->IDR & (1<<5); /* Sample current polarity */
unblank_low(!bit);
} else {
blank();
}
TIM3->SR = 0;
}
void EXTI0_1_IRQHandler(void) {
static uint32_t jitter_meas_sum = 0, jitter_meas_cnt = 0;
EXTI->PR = (1<<0);
/* Store old counter value for jitter measurement. Let it overflow to handle negative offsets. */
int16_t cnt = (int16_t)TIM3->CNT;
/* Re-initialize the counter to align it with the signal edge */
TIM3->EGR |= TIM_EGR_UG;
/* Don't handle overflow of _sum here since this value is only for monitoring anyway */
jitter_meas_sum += (cnt >= 0) ? cnt : -cnt;
if (++jitter_meas_cnt == 1000) { /* One measurement roughly every 800ms */
jitter_meas_avg_ns = jitter_meas_sum;
}
EXTI->IMR = 0;
GPIOB->BRR = (1<<1);
has_sync = 1;
sync_ctr = 0;
}
int main(void) {
//RCC->CR |= RCC_CR_HSEON;
//while (!(RCC->CR&RCC_CR_HSERDY));
@ -133,82 +26,30 @@ int main(void) {
while (!(RCC->CR&RCC_CR_PLLRDY));
RCC->CFGR |= (2<<RCC_CFGR_SW_Pos);
SystemCoreClockUpdate();
SysTick_Config(SystemCoreClock/1000); /* 1ms interval */
/* Turn on lots of neat things */
RCC->AHBENR |= RCC_AHBENR_DMAEN | RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_FLITFEN;
RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN | RCC_APB2ENR_ADCEN| RCC_APB2ENR_DBGMCUEN | RCC_APB2ENR_TIM1EN | RCC_APB2ENR_TIM1EN;;
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
/* TIM3 foo */
TIM3->CCMR2 = (6<<TIM_CCMR2_OC4M_Pos); /* PWM Mode 1 to get a clean trigger signal */
TIM3->CCER = TIM_CCER_CC4E; /* Enable capture/compare unit 4 connected to ADC */
TIM3->CCER = TIM_CCER_CC3E; /* Enable capture/compare unit 3 for unblank interrupt */
TIM3->CCER = TIM_CCER_CC2E;
TIM3->PSC = 48-1; /* 48MHz -> 1MHz */
TIM3->CCR2 = 800-1-1;
TIM3->CCR3 = 100-1; /* CC3 is used for unblanking in the ISR, fires 30us after beginning of cycle. */
TIM3->CCR4 = 800-100-1; /* CC4 is ADC trigger, fire 30us before end of cycle. */
TIM3->ARR = 800-1; /* 1MHz -> 5kHz */
TIM3->DIER |= TIM_DIER_CC2IE | TIM_DIER_CC3IE | TIM_DIER_CC4IE | TIM_DIER_UIE;
TIM3->CR1 |= TIM_CR1_CEN;
NVIC_EnableIRQ(TIM3_IRQn);
NVIC_SetPriority(TIM3_IRQn, 3<<5);
GPIOB->MODER |= (1<<GPIO_MODER_MODER1_Pos);
GPIOB->OSPEEDR |= (2<<GPIO_OSPEEDR_OSPEEDR1_Pos);
EXTI->IMR = (1<<0); /* PA0 Vmeas_A for sync */
EXTI->RTSR |= (1<<0);
NVIC_EnableIRQ(EXTI0_1_IRQn);
NVIC_SetPriority(EXTI0_1_IRQn, 4<<5);
RCC->AHBENR |= RCC_AHBENR_GPIOAEN;
GPIOA->MODER |=
(0<<GPIO_MODER_MODER0_Pos) /* PA0 - Vmeas_A to ADC */
| (0<<GPIO_MODER_MODER1_Pos) /* PA1 - Unused */
| (1<<GPIO_MODER_MODER2_Pos) /* PA2 - LOAD */
| (1<<GPIO_MODER_MODER3_Pos) /* PA3 - CH0 */
| (1<<GPIO_MODER_MODER4_Pos) /* PA4 - CH3 */
| (0<<GPIO_MODER_MODER5_Pos) /* PA5 - TP1 */
| (1<<GPIO_MODER_MODER6_Pos) /* PA6 - CH2 */
| (1<<GPIO_MODER_MODER7_Pos) /* PA7 - CH1 */
| (1<<GPIO_MODER_MODER9_Pos) /* PA9 - synchronous rectifier bypass A */
| (1<<GPIO_MODER_MODER10_Pos);/* PA10 - synchronous rectifier bypass B */
GPIOA->PUPDR |= (2<<GPIO_PUPDR_PUPDR5_Pos);
/* Set shift register IO GPIO output speed */
GPIOA->OSPEEDR |=
(2<<GPIO_OSPEEDR_OSPEEDR2_Pos) /* LOAD */
| (2<<GPIO_OSPEEDR_OSPEEDR3_Pos) /* CH0 */
| (2<<GPIO_OSPEEDR_OSPEEDR4_Pos) /* CH3 */
| (2<<GPIO_OSPEEDR_OSPEEDR6_Pos) /* CH2 */
| (2<<GPIO_OSPEEDR_OSPEEDR7_Pos) /* CH1 */
| (2<<GPIO_OSPEEDR_OSPEEDR9_Pos) /* synchronous rectifier bypass A */
| (2<<GPIO_OSPEEDR_OSPEEDR10_Pos); /* synchronous rectifier bypass B */
set_drv_gpios(0);
protocol_init();
(1<<GPIO_MODER_MODER0_Pos)
| (1<<GPIO_MODER_MODER1_Pos);
int cnt = 0;
int seg_c = 0;
int ph = 0;
while (42) {
/*
if (cnt > 10000) {
if (cnt > 5000) {
cnt = 0;
seg_c += 1;
if (seg_c == 8)
seg_c = 0;
set_outputs_binary(1<<seg_c, 255);
ph += 1;
ph %= 4;
} else {
cnt = cnt+1;
}
*/
/* idle */
switch (ph) {
case 0: GPIOA->ODR = 1; break;
case 1: GPIOA->ODR = 3; break;
case 2: GPIOA->ODR = 2; break;
case 3: GPIOA->ODR = 0; break;
}
}
}
@ -230,12 +71,3 @@ void PendSV_Handler(void) {
asm volatile ("bkpt");
}
void SysTick_Handler(void) {
static int n = 0;
sys_time++;
if (n++ == 1000) {
n = 0;
sys_time_seconds++;
}
}

View file

@ -3,10 +3,12 @@
"active_layer": 40,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,

View file

@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.15,
@ -57,6 +58,7 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
@ -65,6 +67,7 @@
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "warning",
"hole_clearance": "error",
"hole_near_hole": "error",
@ -108,6 +111,7 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.09999999999999999,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
@ -391,7 +395,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -405,13 +409,15 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {

View file

@ -1 +1 @@
0
0

File diff suppressed because it is too large Load diff

View file

@ -3,10 +3,12 @@
"active_layer": 40,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,

View file

@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
@ -62,7 +63,6 @@
"clearance|282944039|58726700|790f4ef6-3f55-4fa4-81c6-33003849f50c|a2f0c0fe-22b1-4b3c-86d3-ad24c9eb552c",
"clearance|288469039|29520000|9425723d-0dad-4e92-9ffa-75b3606da12c|20224eba-6b29-432e-afcb-ea331a43c8fd",
"clearance|288469039|69520000|0eb0a593-9ea3-4404-925c-fe357e9fef85|06e33bfd-0e9a-456e-9f58-5c35518e28b9",
"clearance|289944039|69940000|67f0ed67-a577-4470-8aad-1cbee5900911|06e33bfd-0e9a-456e-9f58-5c35518e28b9",
"courtyards_overlap|273365342|7270001|c4a82479-2bda-4cd4-99b9-204c19f32b07|dbec98c5-ca5b-42e6-ab6d-61d6925880f6",
"courtyards_overlap|274350001|7776443|c4a82479-2bda-4cd4-99b9-204c19f32b07|dbec98c5-ca5b-42e6-ab6d-61d6925880f6",
"courtyards_overlap|325250001|16270001|4f976688-880b-471a-b950-4b4855215a7e|a92d58c2-a950-4743-ba5e-207b46fed029",
@ -75,6 +75,7 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
@ -83,6 +84,7 @@
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
@ -128,6 +130,7 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.075,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
@ -419,15 +422,21 @@
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
@ -437,6 +446,7 @@
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "ignore",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
@ -454,7 +464,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -468,10 +478,10 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.6,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -480,33 +490,73 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "HV",
"nets": [
"/DRV1",
"/DRV2",
"/DRV3",
"/DRV4",
"/DRV_A",
"/DRV_B",
"/OUT_A",
"/OUT_B",
"/VB1",
"/VB2",
"/VIN",
"/VIN_INPUT",
"/VIN_MEAS"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "HV",
"pattern": "/DRV1"
},
{
"netclass": "HV",
"pattern": "/DRV2"
},
{
"netclass": "HV",
"pattern": "/DRV3"
},
{
"netclass": "HV",
"pattern": "/DRV4"
},
{
"netclass": "HV",
"pattern": "/DRV_A"
},
{
"netclass": "HV",
"pattern": "/DRV_B"
},
{
"netclass": "HV",
"pattern": "/OUT_A"
},
{
"netclass": "HV",
"pattern": "/OUT_B"
},
{
"netclass": "HV",
"pattern": "/VB1"
},
{
"netclass": "HV",
"pattern": "/VB2"
},
{
"netclass": "HV",
"pattern": "/VIN"
},
{
"netclass": "HV",
"pattern": "/VIN_INPUT"
},
{
"netclass": "HV",
"pattern": "/VIN_MEAS"
}
]
},
"pcbnew": {
"last_paths": {
@ -521,6 +571,57 @@
},
"schematic": {
"annotate_start_num": 0,
"bom_fmt_presets": [],
"bom_fmt_settings": {
"field_delimiter": ",",
"keep_line_breaks": false,
"keep_tabs": false,
"name": "CSV",
"ref_delimiter": ",",
"ref_range_delimiter": "",
"string_delimiter": "\""
},
"bom_presets": [],
"bom_settings": {
"exclude_dnp": false,
"fields_ordered": [
{
"group_by": false,
"label": "Reference",
"name": "Reference",
"show": true
},
{
"group_by": true,
"label": "Value",
"name": "Value",
"show": true
},
{
"group_by": false,
"label": "Datasheet",
"name": "Datasheet",
"show": true
},
{
"group_by": false,
"label": "Footprint",
"name": "Footprint",
"show": true
},
{
"group_by": false,
"label": "Qty",
"name": "Quantity",
"show": true
}
],
"filter_string": "",
"group_symbols": true,
"name": "Grouped By Value",
"sort_asc": true,
"sort_field": "Reference"
},
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
@ -537,6 +638,10 @@
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.3,
"operating_point_overlay_i_precision": 3,
"operating_point_overlay_i_range": "~A",
"operating_point_overlay_v_precision": 3,
"operating_point_overlay_v_range": "~V",
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.3
},
@ -558,7 +663,12 @@
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},

File diff suppressed because it is too large Load diff

View file

@ -0,0 +1,22 @@
(footprint "proto_3x3" (version 20230410) (generator pcbnew)
(layer "F.Cu")
(attr through_hole)
(fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "Dwgs.User") hide (tstamp 46bb6dc7-58f5-4f26-9ae9-75ed7489d6fd)
(effects (font (size 1 1) (thickness 0.1)))
)
(fp_text value "proto_3x3" (at 0 1 unlocked) (layer "F.Fab") (tstamp 76661532-5791-42a8-b4da-4c1de8ab4132)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user "${REFERENCE}" (at 0 2.5 unlocked) (layer "F.Fab") (tstamp 4827b9a1-3c6b-4d65-933c-455a0e3d03cd)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "1" thru_hole circle (at -2.54 -2.54) (size 2.2 2.2) (drill 1.1) (layers "*.Cu" "*.Mask") (tstamp 8375d10b-19b0-4e25-a5d0-fa7de82b2a57))
(pad "1" thru_hole circle (at -2.54 0) (size 2.2 2.2) (drill 1.1) (layers "*.Cu" "*.Mask") (tstamp 063f7b41-f563-45a9-a038-17f9f111ae04))
(pad "1" thru_hole circle (at -2.54 2.54) (size 2.2 2.2) (drill 1.1) (layers "*.Cu" "*.Mask") (tstamp e78a9d05-2562-4030-9ce2-1d3e7f576a1e))
(pad "1" thru_hole circle (at 0 -2.54) (size 2.2 2.2) (drill 1.1) (layers "*.Cu" "*.Mask") (tstamp 77b07121-6d23-4e87-b583-412dce7c3a1f))
(pad "1" thru_hole circle (at 0 0) (size 2.2 2.2) (drill 1.1) (layers "*.Cu" "*.Mask") (tstamp 6cd283f6-0657-44b0-8c1a-8a5168d6e039))
(pad "1" thru_hole circle (at 0 2.54) (size 2.2 2.2) (drill 1.1) (layers "*.Cu" "*.Mask") (tstamp 0b6b0558-2feb-4aa7-8407-9362acc4ed00))
(pad "1" thru_hole circle (at 2.54 -2.54) (size 2.2 2.2) (drill 1.1) (layers "*.Cu" "*.Mask") (tstamp 714cc91f-43db-4ac4-983a-89ed1e1eb4c0))
(pad "1" thru_hole circle (at 2.54 0) (size 2.2 2.2) (drill 1.1) (layers "*.Cu" "*.Mask") (tstamp fdc3f656-f95d-4f99-85c8-aaeb734a2848))
(pad "1" thru_hole circle (at 2.54 2.54) (size 2.2 2.2) (drill 1.1) (layers "*.Cu" "*.Mask") (tstamp ef0fb373-9454-4a30-a257-b761ae5b2903))
)

View file

@ -0,0 +1,17 @@
(footprint "testpoint_pad_rect" (version 20230410) (generator pcbnew)
(layer "F.Cu")
(attr smd)
(fp_text reference "REF**" (at -0.889 0 unlocked) (layer "Dwgs.User") hide (tstamp 2975fd59-8eb0-4c37-9b60-720d4cefa703)
(effects (font (size 0.6 0.6) (thickness 0.1)) (justify right))
)
(fp_text value "testpoint_pad_rect" (at -1.016 0 unlocked) (layer "F.SilkS") (tstamp 2bbe6a13-a50f-4053-bbaa-fbc708b7d0c9)
(effects (font (size 0.6 0.6) (thickness 0.1) bold) (justify right))
)
(fp_rect (start -0.889 -0.508) (end 0.889 0.508)
(stroke (width 0.05) (type default)) (fill none) (layer "F.CrtYd") (tstamp 6a5dfe1c-752a-436d-a8d0-3e3a0e2a7a6f))
(fp_text user "${REFERENCE}" (at 0 2.5 unlocked) (layer "F.Fab") (tstamp cccc821e-6fbf-4cfa-a300-39e372b643c0)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "1" smd rect (at 0 0) (size 1.5 0.8) (layers "F.Cu" "F.Mask")
(thermal_bridge_angle 45) (tstamp b5ce34cb-7217-4ffd-9efc-91ea442946a0))
)

File diff suppressed because it is too large Load diff

View file

@ -1,7 +1,9 @@
(sym_lib_table
(lib (name "components")(type "Legacy")(uri "${KIPRJMOD}/components.lib")(options "")(descr ""))
(lib (name "driver-rescue")(type "Legacy")(uri "${KIPRJMOD}/driver-rescue.lib")(options "")(descr ""))
(lib (name "center-rescue")(type "Legacy")(uri "C:/Users/jaseg/shared/center/center-rescue.lib")(options "")(descr ""))
(lib (name "tx4138")(type "Legacy")(uri "${KIPRJMOD}/tx4138.lib")(options "")(descr ""))
(lib (name "kicad_sucks")(type "KiCad")(uri "${KIPRJMOD}/kicad_sucks.kicad_sym")(options "")(descr ""))
)
(sym_lib_table
(version 7)
(lib (name "components")(type "Legacy")(uri "${KIPRJMOD}/components.lib")(options "")(descr ""))
(lib (name "driver-rescue")(type "Legacy")(uri "${KIPRJMOD}/driver-rescue.lib")(options "")(descr ""))
(lib (name "center-rescue")(type "Legacy")(uri "C:/Users/jaseg/shared/center/center-rescue.lib")(options "")(descr ""))
(lib (name "tx4138")(type "Legacy")(uri "${KIPRJMOD}/tx4138.lib")(options "")(descr ""))
(lib (name "kicad_sucks")(type "KiCad")(uri "${KIPRJMOD}/kicad_sucks.kicad_sym")(options "")(descr ""))
(lib (name "symbols")(type "KiCad")(uri "${KIPRJMOD}/symbols.kicad_sym")(options "")(descr ""))
)

29
driver/symbols.kicad_sym Normal file
View file

@ -0,0 +1,29 @@
(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
(symbol "BOM_ITEM" (in_bom yes) (on_board yes)
(property "Reference" "X" (at -2.54 0 0)
(effects (font (size 1.27 1.27)))
)
(property "Value" "" (at 0 0 0)
(effects (font (size 1.27 1.27)))
)
(property "Footprint" "" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "BOM_ITEM_0_1"
(polyline
(pts
(xy 0 -0.635)
(xy 0.635 0)
(xy 0 0.635)
(xy -0.635 0)
(xy 0 -0.635)
)
(stroke (width 0) (type default))
(fill (type none))
)
)
)
)