WIP
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parent
8cc05c79ce
commit
f640a83ec8
3 changed files with 140 additions and 27 deletions
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@ -56,7 +56,14 @@
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"width": 0.0
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}
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],
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"drc_exclusions": [],
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"drc_exclusions": [
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"courtyards_overlap|196360001|102626502|00000000-0000-0000-0000-00005de9b522|99d59f94-0300-4758-95c1-fe9bbbbfa783",
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"courtyards_overlap|197763171|110797068|00000000-0000-0000-0000-00005de9b522|c4833d2e-2c9e-4440-8866-6140984cca80",
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"text_thickness|152631995|101175000|00000000-0000-0000-0000-00005de93595|00000000-0000-0000-0000-000000000000",
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"text_thickness|156049472|101175000|00000000-0000-0000-0000-00005de935c0|00000000-0000-0000-0000-000000000000",
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"text_thickness|178000000|68444662|e1e8791b-f102-4509-9948-1986c49e1265|00000000-0000-0000-0000-000000000000",
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"unresolved_variable|206814520|80002996|002cb8c7-b00a-4e5f-a820-e69219752984|00000000-0000-0000-0000-000000000000"
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],
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"meta": {
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"filename": "board_design_settings.json",
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"version": 2
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File diff suppressed because one or more lines are too long
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@ -63,7 +63,7 @@ int main(void) {
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TIM3->CR2 = (2<<TIM_CR2_MMS_Pos); /* Update event on TRGO */
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TIM3->PSC = 0;
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/* We sample 32 times per 1 kHz AC cycle, and use 16 times oversampling. */
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/* We sample 32 times per 1 kHz AC cycle, and use 32 times oversampling. */
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TIM3->ARR = 124; /* Output 64 MHz / 125 = 512 kHz signal */
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TIM3->CR1 = TIM_CR1_CEN;
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@ -100,6 +100,7 @@ int main(void) {
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GPIOC->MODER = OUT(15) | ANALOG(14) | ANALOG(9);
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DBG->APBFZ1 |= DBG_APB_FZ1_DBG_TIM3_STOP;
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DBG->APBFZ2 |= DBG_APB_FZ2_DBG_TIM1_STOP;
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while (42) {
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}
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}
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@ -124,9 +125,86 @@ void TIM1_CC_IRQHandler(void) {
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}
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void DMA1_Channel1_IRQHandler(void) {
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static int32_t bottom = -1;
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static int32_t top = -1;
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DMA1->IFCR = DMA_IFCR_CTCIF1;
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if (bottom >= 0) {
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uint32_t amplitude = top - bottom;
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uint32_t middle = bottom + amplitude / 2;
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const uint32_t lower_thr = bottom + amplitude / 4;
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const uint32_t upper_thr = top - amplitude / 4;
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const uint32_t adc_clockdiv = 125 * 32;
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//const uint32_t adc_clockdiv = 1; /* FIXME DEBUG */
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size_t num_edges = 0;
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ssize_t edge_indices[24];
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int state = 0;
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ssize_t run_start = -1;
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int last_v = -1;
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for (ssize_t i=0; i<COUNT_OF(adc_data)-1; i++) {
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uint32_t a = adc_data[i], b = adc_data[i+1];
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if (state == 0) {
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if (a < lower_thr && b > lower_thr) {
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state = 1;
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run_start = i+1;
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} else if (a > upper_thr && b < upper_thr) {
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state = -1;
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run_start = i+1;
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}
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} else if (state == 1) {
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if (b < a) {
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state = 0;
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} else if (a < upper_thr && b > upper_thr) {
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/* run from run_start (incl.) to i (incl.) */
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uint32_t v0 = adc_data[run_start];
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int d = a - v0;
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int c = i - run_start;
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size_t intercept = run_start * adc_clockdiv + (middle - v0) * adc_clockdiv * c / d;
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if (num_edges < COUNT_OF(edge_indices)) {
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edge_indices[num_edges] = intercept;
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num_edges++;
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}
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state = 0;
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}
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} else if (state == -1) {
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if (b > a) {
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state = 0;
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} else if (a > lower_thr && b < lower_thr) {
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/* run from run_start (incl.) to i (incl.) */
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uint32_t v0 = adc_data[run_start];
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int d = a - v0;
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int c = i - run_start;
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size_t intercept = run_start * adc_clockdiv + (middle - v0) * adc_clockdiv * c / d;
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if (num_edges < COUNT_OF(edge_indices)) {
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edge_indices[num_edges] = intercept;
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num_edges++;
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}
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state = 0;
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}
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}
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}
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asm volatile ("bkpt");
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}
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const int discard = 5;
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const int keep = 32;
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quicksort(adc_data, &adc_data[COUNT_OF(adc_data)-1]);
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asm volatile ("bkpt");
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for (size_t i=0; i<keep; i++) {
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bottom += adc_data[discard + i];
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top += adc_data[COUNT_OF(adc_data) - 1 - discard - i];
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}
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bottom /= keep;
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top /= keep;
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sync_running = false;
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}
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