jaseg/8seg
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

WIP

Browse source
This commit is contained in:
jaseg 2022-05-08 16:36:25 +02:00
parent f21e9797a2
commit 2e7724b960
6 changed files with 103 additions and 56 deletions
Download patch file Download diff file Expand all files Collapse all files

8
driver_fw/main.c
View file

@ -96,6 +96,8 @@ static int flipbits10(int in) {
}
uint8_t spinner = 0; /* FIXME DEBUG */
int main(void) {
/* Startup code */
RCC->CR |= RCC_CR_HSEON;
@ -220,6 +222,7 @@ int main(void) {
while (42) {
if (sys_flag_1Hz) { /* Update display every second */
sys_flag_1Hz = 0;
spinner = ~spinner;
char buf[17];
int temp = mcp9801_read_mdegC();
@ -252,8 +255,9 @@ int hamming_weight(int i) {
void TIM3_IRQHandler() {
static int txpos = -1;
static unsigned int tx_start_tick = 0;
static uint8_t txbuf[2] = {0x04, 0x05};
static uint8_t txbuf[3] = {0x05, 0x01, 0};
static int backchannel_counter = 0;
txbuf[2] = spinner;
TIM3->SR &= ~TIM_SR_UIF;
int sym = txstate.current_symbol;
@ -294,7 +298,7 @@ void TIM3_IRQHandler() {
txstate.current_symbol = sym;
/* FIXME factor out into header, or even make configurable */
#define DEAD_TIME 100
#define DEAD_TIME 1
/* Set both CCRs to values for opposing polarities. The dead time is always inserted at the beginning of the timer
* cycle due to the way the capture/compare unit PWM machinery works. By setting the CCR to 0xffff we make sure the
* output is never turned on, since 0xffff is larger than the ARR/counter top value.

4
driver_fw/openocd.cfg
View file

@ -1,8 +1,8 @@
telnet_port 4444
gdb_port 3333
source [find interface/stlink-v2.cfg]
#hla_serial "000000000001"
source [find interface/stlink.cfg]
hla_serial "54FF6B064987495026541187"
transport select hla_swd
source [find target/stm32f0x.cfg]