jaseg
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f037001053
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Add local changes
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2020-04-11 17:33:20 +02:00 |
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jaseg
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31fc78d0e0
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Add some documentation
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2018-01-05 11:39:20 +01:00 |
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jaseg
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a70ad99b36
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Make status request work, fix uc-side cobs encoding bug
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2017-12-10 20:17:51 +01:00 |
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jaseg
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723995c541
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hw v0.4
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2017-09-18 11:30:25 +02:00 |
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jaseg
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a823484163
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Fix up RS485/digital power label
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2017-09-06 14:36:50 +02:00 |
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jaseg
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d4d0f850f0
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Fix up version label and one ground trace
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2017-09-06 14:30:43 +02:00 |
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jaseg
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febcb5a933
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Fixes for second prototype (v0.3)
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2017-09-06 14:03:07 +02:00 |
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jaseg
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1ae37bce5b
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Second production run, v0.3
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2017-07-21 20:01:20 +02:00 |
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jaseg
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5bb67efb4a
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Final silk art positioning
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2017-07-21 01:00:43 +02:00 |
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jaseg
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16328e9723
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Second board revision
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2017-07-20 16:05:07 +02:00 |
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jaseg
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6ec97df9de
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Schematic fixed up so far
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2017-07-15 22:43:04 +02:00 |
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jaseg
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6f12a41cc6
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Add resistor calculation script
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2017-06-12 13:03:18 +02:00 |
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jaseg
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4dbd135d68
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foo
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2017-06-10 19:13:42 +02:00 |
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jaseg
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0f52be1e7a
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Release v0.2
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2017-05-17 11:25:17 +02:00 |
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jaseg
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7d34875369
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Design mostly done
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2017-05-04 13:47:53 +02:00 |
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jaseg
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91f22c5435
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Layout mostly done
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2017-05-02 16:05:05 +02:00 |
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jaseg
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cb2ca6e9c9
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Foo
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2017-04-30 15:58:28 +02:00 |
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jaseg
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cdc0c4fa07
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Pre safety fixup
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2017-04-29 20:56:06 +02:00 |
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jaseg
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b5bf5670b6
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Added protection stuff
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2017-04-28 21:29:58 +02:00 |
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jaseg
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9af9f5768b
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Initial commit
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2017-04-26 11:57:45 +02:00 |
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