Fixed aux cycle
This commit is contained in:
jaseg
parent
1c58250425
commit
d2194c5ae2
1 changed files with 55 additions and 50 deletions
105
fw/main.c
105
fw/main.c
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@ -141,14 +141,6 @@ unsigned int stk_microseconds(void) {
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return sys_time*1000 + (1000 - (SysTick->VAL / (SystemCoreClock/1000000)));
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}
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enum {
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SPI_AUX,
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SPI_WORD0,
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SPI_WORD1,
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SPI_IDLE,
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} spi_state;
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static volatile uint32_t spi_word = 0;
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void cfg_spi1() {
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/* Configure SPI controller */
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SPI1->I2SCFGR = 0;
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@ -156,46 +148,23 @@ void cfg_spi1() {
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SPI1->CR2 &= ~SPI_CR2_DS_Msk;
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SPI1->CR2 |= LL_SPI_DATAWIDTH_16BIT;
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/* Baud rate PCLK/2 -> 25MHz */
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/* Baud rate PCLK/4 -> 12.5MHz */
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SPI1->CR1 =
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SPI_CR1_BIDIMODE
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| SPI_CR1_BIDIOE
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| SPI_CR1_SSM
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| SPI_CR1_SSI
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| SPI_CR1_SPE
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| (0<<SPI_CR1_BR_Pos)
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| (1<<SPI_CR1_BR_Pos)
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| SPI_CR1_MSTR
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| SPI_CR1_CPOL
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| SPI_CR1_CPHA;
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/* FIXME maybe try w/o BIDI */
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NVIC_EnableIRQ(SPI1_IRQn);
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NVIC_SetPriority(SPI1_IRQn, 2);
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}
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void SPI1_IRQHandler() {
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GPIOA->BSRR = GPIO_BSRR_BS_0; // Debug
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switch (spi_state) {
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case SPI_AUX:
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strobe_aux();
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SPI1->DR = spi_word>>16;
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break;
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case SPI_WORD0:
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SPI1->DR = spi_word&0xFFFF;
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break;
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default:
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tick(); /* This one is important. Otherwise, weird stuff happens and parts of the aux register seem to leak
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into the driver registers. */
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strobe_leds();
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SPI1->CR2 &= ~SPI_CR2_TXEIE;
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break;
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}
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spi_state ++;
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GPIOA->BSRR = GPIO_BSRR_BR_0; // Debug
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}
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uint8_t segment_map[8] = {5, 7, 6, 4, 1, 3, 0, 2};
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static volatile uint32_t aux_reg = 0;
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static volatile int frame_duration_us;
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volatile int nbits = MAX_BITS;
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/* returns new bit time in cycles */
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@ -213,9 +182,11 @@ int shift_data() {
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if (active_segment == NSEGMENTS) {
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active_segment = 0;
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/* FIXME remove this?
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int time = stk_microseconds();
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frame_duration_us = time - last_frame_time;
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last_frame_time = time;
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*/
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if (fb_op == FB_UPDATE) {
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volatile struct framebuf *tmp = read_fb;
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read_fb = write_fb;
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@ -224,17 +195,21 @@ int shift_data() {
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}
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}
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spi_word = read_fb->data[active_bit*FRAME_SIZE_WORDS + active_segment];
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spi_state = SPI_AUX;
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SPI1->DR = (read_fb->brightness ? SR_ILED_HIGH : SR_ILED_LOW)
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| (led_state<<1)
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| (0xff00 ^ (0x100<<segment_map[active_segment]));
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} else {
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spi_word = read_fb->data[active_bit*FRAME_SIZE_WORDS + active_segment];
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spi_state = SPI_WORD0;
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SPI1->DR = spi_word>>16;
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GPIOA->BSRR = GPIO_BSRR_BR_10;
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SPI1->DR = aux_reg | segment_map[active_segment];
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while (SPI1->SR & SPI_SR_BSY);
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GPIOA->BSRR = GPIO_BSRR_BS_10;
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}
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SPI1->CR2 |= SPI_CR2_TXEIE;
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uint32_t spi_word = read_fb->data[active_bit*FRAME_SIZE_WORDS + active_segment];
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SPI1->DR = spi_word>>16;
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spi_word &= 0xFFFF;
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while (!(SPI1->SR & SPI_SR_TXE));
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SPI1->DR = spi_word;
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while (!(SPI1->SR & SPI_SR_TXE));
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//tick();
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//strobe_leds();
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// FIXME SPI1->CR2 |= SPI_CR2_TXEIE;
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return active_bit;
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}
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@ -246,7 +221,9 @@ int shift_data() {
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/* This value is a constant offset added to every bit period to allow for the timer IRQ handler to execute. This is set
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* empirically using a debugger and a logic analyzer. */
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#define TIMER_CYCLES_FOR_SPI_TRANSMISSIONS 25
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#define TIMER_CYCLES_FOR_SPI_TRANSMISSIONS 21
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#define TIMER_CYCLES_BEFORE_LED_STROBE 20
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/* Defines for brevity */
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#define A TIMER_CYCLES_FOR_SPI_TRANSMISSIONS
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@ -288,14 +265,29 @@ void cfg_timer3() {
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* interrupt to load the next bits in to the shift registers. Channel 2 triggers simultaneously with channel 1 at
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* long !OE periods but will be delayed slightly to a fixed 32 timer periods (12.8us) to allow for SPI1 to finish
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* shifting out all frame data before asserting !OE. */
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TIM3->CR2 = (2<<TIM_CR2_MMS_Pos); /* master mode: update */
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TIM3->CCMR1 = (6<<TIM_CCMR1_OC1M_Pos) | TIM_CCMR1_OC1PE; /* PWM Mode 1, enable CCR preload */
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TIM3->CCER = TIM_CCER_CC1E; /* Inverting output */
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TIM3->CCER = TIM_CCER_CC1E;
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TIM3->CCR1 = TIMER_CYCLES_FOR_SPI_TRANSMISSIONS;
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TIM3->DIER = TIM_DIER_UIE;
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TIM3->PSC = SystemCoreClock/5000000 * 2 - 1; /* 0.20us/tick */
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TIM3->ARR = 0xffff;
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TIM3->EGR |= TIM_EGR_UG;
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TIM3->CR1 = TIM_CR1_ARPE;
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TIM3->CR1 |= TIM_CR1_CEN;
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TIM1->SR = 0;
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TIM1->BDTR = TIM_BDTR_MOE;
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TIM1->SMCR = (2<<TIM_SMCR_TS_Pos) | (4<<TIM_SMCR_SMS_Pos); /* Internal Trigger 2 (ITR2) -> TIM3; slave mode: reset */
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TIM1->CCMR1 = (6<<TIM_CCMR1_OC2M_Pos) | TIM_CCMR1_OC2PE; /* PWM Mode 1, enable CCR preload */
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TIM1->CCER = TIM_CCER_CC2E;
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TIM1->CCR2 = TIMER_CYCLES_BEFORE_LED_STROBE;
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TIM1->PSC = TIM3->PSC; /* 0.20us/tick */
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TIM1->ARR = 0xffff;
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TIM1->EGR |= TIM_EGR_UG;
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TIM1->CR1 = TIM_CR1_ARPE;
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TIM1->CR1 |= TIM_CR1_CEN;
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NVIC_EnableIRQ(TIM3_IRQn);
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NVIC_SetPriority(TIM3_IRQn, 2);
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}
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@ -305,7 +297,6 @@ void TIM3_IRQHandler() {
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//TIM3->CR1 &= ~TIM_CR1_CEN_Msk; FIXME
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int idx = shift_data();
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TIM3->CCR1 = TIMER_CYCLES_FOR_SPI_TRANSMISSIONS;
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TIM3->ARR = timer_period_lookup[idx];
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TIM3->SR &= ~TIM_SR_UIF_Msk;
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@ -418,7 +409,7 @@ int main(void) {
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SystemCoreClockUpdate();
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RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_DMAEN | RCC_AHBENR_CRCEN | RCC_AHBENR_FLITFEN;
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RCC->APB2ENR |= RCC_APB2ENR_SPI1EN | RCC_APB2ENR_USART1EN | RCC_APB2ENR_SYSCFGEN | RCC_APB2ENR_ADCEN | RCC_APB2ENR_DBGMCUEN;
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RCC->APB2ENR |= RCC_APB2ENR_SPI1EN | RCC_APB2ENR_USART1EN | RCC_APB2ENR_SYSCFGEN | RCC_APB2ENR_ADCEN | RCC_APB2ENR_DBGMCUEN | RCC_APB2ENR_TIM1EN;
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RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
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GPIOA->MODER |=
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@ -430,7 +421,7 @@ int main(void) {
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| (2<<GPIO_MODER_MODER5_Pos) /* PA5 - SCLK */
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| (2<<GPIO_MODER_MODER6_Pos) /* PA6 - LED !OE */
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| (2<<GPIO_MODER_MODER7_Pos) /* PA7 - MOSI */
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| (1<<GPIO_MODER_MODER9_Pos) /* PA9 - LED strobe */
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| (2<<GPIO_MODER_MODER9_Pos) /* PA9 - LED strobe */
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| (1<<GPIO_MODER_MODER10_Pos);/* PA10 - Auxiliary strobe */
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/* Set shift register IO GPIO output speed */
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@ -453,6 +444,8 @@ int main(void) {
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| (0<<GPIO_AFRL_AFRL5_Pos) /* SPI1_SCK */
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| (1<<GPIO_AFRL_AFRL6_Pos) /* TIM3_CH1 */
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| (0<<GPIO_AFRL_AFRL7_Pos); /* SPI1_MOSI */
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GPIOA->AFR[1] |=
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(2<<GPIO_AFRH_AFRH1_Pos); /* TIM1_CH2 */
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GPIOA->PUPDR |=
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(2<<GPIO_PUPDR_PUPDR1_Pos) /* RS485 DE: Pulldown */
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@ -461,6 +454,11 @@ int main(void) {
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cfg_spi1();
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/* Pre-compute aux register values for timer ISR */
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for (int i=0; i<sizeof(segment_map)/sizeof(segment_map[0]); i++) {
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segment_map[i] = 0xff00 ^ (0x100<<segment_map[i]);
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}
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/* Clear frame buffer */
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read_fb->brightness = 1;
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for (int i=0; i<sizeof(read_fb->data)/sizeof(uint32_t); i++) {
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@ -473,7 +471,14 @@ int main(void) {
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adc_config();
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volatile uint8_t *rxd = rx_buf.byte_data;
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int k=0;
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while (42) {
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aux_reg = (read_fb->brightness ? SR_ILED_HIGH : SR_ILED_LOW) | (led_state<<1);
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if (k++ == 1000000) {
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k = 0;
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led_state = (led_state+1)&7;
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}
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if (USART1->ISR & USART_ISR_RXNE) {
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*rxd++ = USART1->RDR;
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if (rxd >= rx_buf.set_fb_rq.end) {
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@ -508,6 +513,6 @@ void SysTick_Handler(void) {
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if (n++ == 1000) {
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n = 0;
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sys_time_seconds++;
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}
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}
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}
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