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tachibana/demo/fpga
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jaseg aeda28a467 Border matching seems to be mostly working
2021-07-20 19:37:32 +02:00
..
constraints Re-organize gateware into its own subdir 2021-07-14 19:06:15 +02:00
src Border matching seems to be mostly working 2021-07-20 19:37:32 +02:00
test_bench Border matching seems to be mostly working 2021-07-20 19:37:32 +02:00
Artix-7-HDMI-processing.xpr Border matching seems to be mostly working 2021-07-20 19:37:32 +02:00
charmap_gen.ipynb Re-organize gateware into its own subdir 2021-07-14 19:06:15 +02:00
spi_regfile_tb_behav.wcfg Re-organize gateware into its own subdir 2021-07-14 19:06:15 +02:00
term_emu_tb_behav.wcfg Re-organize gateware into its own subdir 2021-07-14 19:06:15 +02:00
term_renderer_tb_behav.wcfg Re-organize gateware into its own subdir 2021-07-14 19:06:15 +02:00
window_matcher_tb_behav.wcfg Re-organize gateware into its own subdir 2021-07-14 19:06:15 +02:00