jaseg/tachibana
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Change window matcher to use border handling

Browse source
This commit is contained in:
jaseg 2021-07-20 23:12:55 +02:00
parent 0556f75dd8
commit 6ee66e847c
3 changed files with 15 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

2
demo/fpga/Artix-7-HDMI-processing.xpr
View file

@ -42,7 +42,7 @@
<Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
<Option Name="EnableBDX" Val="FALSE"/>
<Option Name="WTXSimLaunchSim" Val="599"/>
<Option Name="WTXSimLaunchSim" Val="611"/>
<Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/>

16
demo/fpga/src/window_matcher.v
View file

@ -307,6 +307,8 @@ module window_matcher(
/* Border match locking process */
reg [11:0] border_w;
reg [11:0] border_h;
reg [11:0] border_right_reg;
reg [11:0] border_bottom_reg;
reg border_matched;
always @(posedge clk) begin
@ -314,6 +316,8 @@ module window_matcher(
border_matched <= 0;
border_w <= 0;
border_h <= 0;
border_right_reg <= 0;
border_bottom_reg <= 0;
end else begin
if (in_vsync_reg == 0 && in_vsync == 1) begin
@ -321,11 +325,15 @@ module window_matcher(
border_matched <= 1;
border_w <= border_right - win_x - 1;
border_h <= border_bottom - win_y;
border_right_reg <= border_right;
border_bottom_reg <= border_bottom;
end else begin
border_matched <= 0;
border_w <= 0;
border_h <= 0;
border_right_reg <= 0;
border_bottom_reg <= 0;
end
end
end
@ -378,13 +386,13 @@ module window_matcher(
win_hactive <= 0;
end else begin
if (win_locked) begin
if (border_matched) begin
/* hsync */
if (scan_x == win_x && win_hactive) begin
if (scan_x == win_x + 1 && win_hactive) begin
win_blank <= 0;
end
if (scan_x == win_right || in_blank) begin
if (scan_x == border_right_reg || in_blank) begin
win_blank <= 1;
end
@ -392,7 +400,7 @@ module window_matcher(
win_hactive <= 1;
end
if (scan_y == win_bottom && !in_blank_reg && in_blank) begin
if (scan_y + 1 == border_bottom_reg && !in_blank_reg && in_blank) begin
win_hactive <= 0;
end

2
demo/fpga/test_bench/test_data/.gitignore vendored Normal file
View file

@ -0,0 +1,2 @@
*.v
*.hex