90ce052d82
Doesn't do much other than reply with an increasing pattern, but at least the basic wiring is now in place.
140 lines
3.9 KiB
C
140 lines
3.9 KiB
C
/*
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* March 2017 Karl Palsson <karlp@tweak.net.au>
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*/
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#include <errno.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/spi.h>
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#include <libopencm3/stm32/usart.h>
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#include "hw.h"
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#define LED_DISCO_GREEN_PORT GPIOB // actually cs
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#define LED_DISCO_GREEN_PIN GPIO6
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struct hw_detail hw_details = {
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.periph = SPI1,
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.periph_rcc = RCC_SPI1,
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.periph_rst = RST_SPI1,
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.pins = GPIO5| GPIO6 | GPIO7, /* SPI pins for setting AF with */
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.port = GPIOA,
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.port_rcc = RCC_GPIOA,
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.trigger_rcc = RCC_GPIOB,
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.trigger_port = GPIOB,
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.trigger_pin = GPIO8, // pb6 is d7 on the LA
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};
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/* provided in board files please*/
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/**
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* Setup any gpios or anything hardware specific.
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* Should _only_ be things that can't be done in shared init()
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*/
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static void hw_init(void)
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{
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/* trigger pin gpio */
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rcc_periph_clock_enable(hw_details.trigger_rcc);
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gpio_mode_setup(hw_details.trigger_port, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, hw_details.trigger_pin);
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/* spi control lines */
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rcc_periph_clock_enable(hw_details.port_rcc);
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gpio_mode_setup(hw_details.port, GPIO_MODE_AF, GPIO_PUPD_NONE, hw_details.pins);
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gpio_set_output_options(hw_details.port, GPIO_OTYPE_PP, GPIO_OSPEED_MED, hw_details.pins);
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gpio_set_af(hw_details.port, GPIO_AF0, hw_details.pins);
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}
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static void test_init(void)
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{
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/* Setup SPI parameters. */
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rcc_periph_clock_enable(hw_details.periph_rcc);
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spi_init_master(hw_details.periph, SPI_CR1_BAUDRATE_FPCLK_DIV_32, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, SPI_CR1_MSBFIRST);
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/* Ignore the stupid NSS pin. */
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spi_enable_software_slave_management(hw_details.periph);
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spi_set_nss_high(hw_details.periph);
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/* Finally enable the SPI. */
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spi_enable(hw_details.periph);
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}
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static void test_task(void) {
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static int i = 0;
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printf("DUT iter %d\n", i++);
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gpio_set(hw_details.trigger_port, hw_details.trigger_pin);
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gpio_clear(LED_DISCO_GREEN_PORT, LED_DISCO_GREEN_PIN);
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spi_xfer(hw_details.periph, 0xaa);
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spi_xfer(hw_details.periph, 0x42);
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spi_xfer(hw_details.periph, 0x69);
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gpio_set(LED_DISCO_GREEN_PORT, LED_DISCO_GREEN_PIN);
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gpio_clear(hw_details.trigger_port, hw_details.trigger_pin);
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}
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static
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void setup_usart(void)
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{
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uint32_t dev = USART2;
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rcc_periph_clock_enable(RCC_USART2);
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rcc_periph_clock_enable(RCC_GPIOA);
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gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2|GPIO3);
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gpio_set_af(GPIOA, GPIO_AF4, GPIO2|GPIO3);
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usart_set_baudrate(dev, 115200);
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usart_set_databits(dev, 8);
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usart_set_parity(dev, USART_PARITY_NONE);
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usart_set_stopbits(dev, USART_STOPBITS_1);
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usart_set_mode(dev, USART_MODE_TX_RX);
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usart_set_flow_control(dev, USART_FLOWCONTROL_NONE);
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/* Finally enable the USART. */
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usart_enable(dev);
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}
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static void setup(void)
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{
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setup_usart();
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printf("hi guys!\n");
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hw_init();
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test_init();
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}
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int main(void)
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{
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const struct rcc_clock_scale myclock = {
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.pll_source = RCC_CFGR_PLLSRC_HSI16_CLK,
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.pll_mul = RCC_CFGR_PLLMUL_MUL4,
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.pll_div = RCC_CFGR_PLLDIV_DIV2,
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.hpre = RCC_CFGR_HPRE_NODIV,
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.ppre1 = RCC_CFGR_PPRE1_NODIV,
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.ppre2 = RCC_CFGR_PPRE2_NODIV,
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.voltage_scale = PWR_SCALE1,
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.flash_waitstates = 1,
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.ahb_frequency = 32e6,
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.apb1_frequency = 32e6,
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.apb2_frequency = 32e6,
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};
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int i, j;
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rcc_clock_setup_pll(&myclock);
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rcc_periph_clock_enable(RCC_SYSCFG);
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/* green led for ticking */
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rcc_periph_clock_enable(RCC_GPIOB);
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gpio_mode_setup(LED_DISCO_GREEN_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_DISCO_GREEN_PIN);
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gpio_set(LED_DISCO_GREEN_PORT, LED_DISCO_GREEN_PIN);
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setup();
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while (1) {
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test_task();
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//gpio_toggle(LED_DISCO_GREEN_PORT, LED_DISCO_GREEN_PIN);
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for (i = 0; i < 0x80000; i++) { /* Wait a bit. */
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__asm__("NOP");
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}
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}
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return 0;
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}
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