cb376f3959
Not sure which kicad files are necessary and which are local yet! Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st board, giving access to test: * DAC->ADC (both directions) * I2C (both directions) * SPI (both directions) * Uart (both directions) a socket for a cheap fx2 based logic analyser will be included, so that sigrok can be used to capture tests of the actual line states.
32 lines
1.9 KiB
Text
32 lines
1.9 KiB
Text
(module Socket_Strip_Arduino_1x06 (layer F.Cu) (tedit 551AF7D9)
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(descr "Through hole socket strip")
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(tags "socket strip")
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(fp_text reference REF** (at 0 -5.1) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value Socket_Strip_Arduino_1x06 (at 0 -3.1) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start 14.45 -1.75) (end 14.45 1.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 -1.75) (end 14.45 -1.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 1.75) (end 14.45 1.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.27 1.27) (end 13.97 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 13.97 1.27) (end 13.97 -1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 13.97 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.55 1.55) (end 0 1.55) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.55 -1.55) (end -1.55 1.55) (layer F.SilkS) (width 0.15))
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(pad 1 thru_hole oval (at 0 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
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(pad 2 thru_hole oval (at 2.54 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
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(pad 3 thru_hole oval (at 5.08 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
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(pad 4 thru_hole oval (at 7.62 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
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(pad 5 thru_hole oval (at 10.16 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
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(pad 6 thru_hole oval (at 12.7 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
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(model ${KIPRJMOD}/Socket_Arduino_Uno.3dshapes/Socket_header_Arduino_1x06.wrl
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(at (xyz 0.25 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 180))
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)
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)
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