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11 commits

Author SHA1 Message Date
Karl Palsson
b33de16ac9 "fix" grounds by tracks into pour 
"finish" routing, ignore DRC violations from disconnected usb shield on
pin 6.

Add boot0 jumper pad "just in case" but really kinda dumb, we've got a
debug header on it. Why bother with this?

Change paper size in schema to get more space.

TODO: add silk?
TODO: replace "arduino" shape with just the pinpoints.
 2017-12-17 22:28:07 +00:00
Karl Palsson
74b958c599 hw1: continued, just intermediate progress save 
wtf kicad, why aren't my grounds connected?!
 2017-12-11 22:02:56 +00:00
Karl Palsson
afb3081feb hw1: add crystal, more commentary 
probably need a crystal for usb :)

still needs footrints, will probably be any old 3225 part.
 2017-11-20 23:46:57 +00:00
Karl Palsson
9c78e2ae40 hw1: begin routing. 
Spun the host, laid most signal tracks.
todo: vcc, ground pour, then shuffle all LA connectors for ease of
routing.
 2017-11-19 23:33:38 +00:00
Karl Palsson
c267237013 hw1: apparently _actually_ save the file 2017-11-17 23:21:16 +00:00
Karl Palsson
52238907c3 hw1: add in/out caps to 3v3 2017-11-17 23:14:23 +00:00
Karl Palsson
1dc853bd8b git ignore more backups 2017-11-17 23:09:34 +00:00
Karl Palsson
3aa65ec998 add "klibs" with new regulator 2017-11-17 23:09:07 +00:00
Karl Palsson
028ebeacbc gitignore kicad .bak files 2017-11-17 23:01:32 +00:00
Karl Palsson
9994a66a3e hw1: schematic "finished" ? 
have I committed enough files for others to even open this?
 2017-11-17 23:00:50 +00:00
Karl Palsson
cb376f3959 WIP: hardware test partner round 1 
Not sure which kicad files are necessary and which are local yet!

Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st
board, giving access to test:
* DAC->ADC (both directions)
* I2C (both directions)
* SPI (both directions)
* Uart (both directions)

a socket for a cheap fx2 based logic analyser will be included, so that
sigrok can be used to capture tests of the actual line states.
 2017-10-07 15:20:00 +00:00