Not really sure, did I forget to checkin after shipping out? Something
got updated after a dot update of kicad? revision control of pcbs and
schematics still sucks hard.
"finish" routing, ignore DRC violations from disconnected usb shield on
pin 6.
Add boot0 jumper pad "just in case" but really kinda dumb, we've got a
debug header on it. Why bother with this?
Change paper size in schema to get more space.
TODO: add silk?
TODO: replace "arduino" shape with just the pinpoints.
Not sure which kicad files are necessary and which are local yet!
Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st
board, giving access to test:
* DAC->ADC (both directions)
* I2C (both directions)
* SPI (both directions)
* Uart (both directions)
a socket for a cheap fx2 based logic analyser will be included, so that
sigrok can be used to capture tests of the actual line states.