basic uart: f4 and f3, prepping tests for usart-v2
use parity to at least test a little more of the common code
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29
tests/uart-basic/Makefile.stm32f3-disco
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29
tests/uart-basic/Makefile.stm32f3-disco
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# This is just a makefile.
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# Consider it released into the public domain, or, where not available,
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# available under your choice of BSD2clause, MIT, X11, ISC or Apache2 licenses
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# Karl Palsson <karlp@tweak.net.au>
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BOARD = stm32f3-disco
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PROJECT = uart-basic-$(BOARD)
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BUILD_DIR = bin-$(BOARD)
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SHARED_DIR = ../../shared
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CFILES = main-$(BOARD).c
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CFILES += uart-basic.c
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# No trace, we're using the uart explicitly here, deliberately.
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# Perhaps later we'll use trace differently, or with different files
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#CFILES += trace.c trace_stdio.c
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VPATH += $(SHARED_DIR)
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INCLUDES += $(patsubst %,-I%, . $(SHARED_DIR))
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OPENCM3_DIR=../../libopencm3/
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### This section can go to an arch shared rules eventually...
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DEVICE=stm32f303vct6
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#OOCD_INTERFACE = stlink-v2
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#OOCD_TARGET = stm32f3x
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OOCD_FILE = ../../openocd/openocd.stm32f3-disco.cfg
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include ../../rules.mk
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29
tests/uart-basic/Makefile.stm32f4-disco
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29
tests/uart-basic/Makefile.stm32f4-disco
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@ -0,0 +1,29 @@
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# This is just a makefile.
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# Consider it released into the public domain, or, where not available,
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# available under your choice of BSD2clause, MIT, X11, ISC or Apache2 licenses
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# Karl Palsson <karlp@tweak.net.au>
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BOARD = stm32f4-disco
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PROJECT = uart-basic-$(BOARD)
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BUILD_DIR = bin-$(BOARD)
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SHARED_DIR = ../../shared
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CFILES = main-$(BOARD).c
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CFILES += uart-basic.c
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# No trace, we're using the uart explicitly here, deliberately.
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# Perhaps later we'll use trace differently, or with different files
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#CFILES += trace.c trace_stdio.c
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VPATH += $(SHARED_DIR)
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INCLUDES += $(patsubst %,-I%, . $(SHARED_DIR))
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OPENCM3_DIR=../../libopencm3/
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### This section can go to an arch shared rules eventually...
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DEVICE=stm32f405xg
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#OOCD_INTERFACE = stlink-v2
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#OOCD_TARGET = stm32f4x
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OOCD_FILE = ../../openocd/openocd.stm32f4-disco.cfg
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include ../../rules.mk
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136
tests/uart-basic/main-stm32f3-disco.c
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136
tests/uart-basic/main-stm32f3-disco.c
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/*
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* Oct 2017 Karl Palsson <karlp@tweak.net.au>
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*/
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#include <errno.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/flash.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/usart.h>
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#include "uart-basic.h"
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/* f3 pll setup, based on l1/f4*/
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typedef struct {
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uint8_t pll_mul;
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uint8_t pll_div;
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uint8_t pll_source;
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uint32_t flash_config;
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uint8_t hpre;
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uint8_t ppre1;
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uint8_t ppre2;
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uint32_t apb1_frequency;
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uint32_t apb2_frequency;
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uint32_t ahb_frequency;
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} rcc_clock_scale_t;
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static void rcc_clock_setup_pll_f3_special(const rcc_clock_scale_t *clock)
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{
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/* Turn on the appropriate source for the PLL */
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// TODO, some f3's have extra bits here
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enum rcc_osc my_osc;
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if (clock->pll_source == RCC_CFGR_PLLSRC_HSE_PREDIV) {
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my_osc = RCC_HSE;
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} else {
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my_osc = RCC_HSI;
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}
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rcc_osc_on(my_osc);
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while (!rcc_is_osc_ready(my_osc));
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/* Configure flash settings. */
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flash_set_ws(clock->flash_config);
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/*
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* Set prescalers for AHB, ADC, ABP1, ABP2.
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* Do this before touching the PLL (TODO: why?).
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*/
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rcc_set_hpre(clock->hpre);
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rcc_set_ppre1(clock->ppre1);
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rcc_set_ppre2(clock->ppre2);
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rcc_osc_off(RCC_PLL);
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while (rcc_is_osc_ready(RCC_PLL));
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rcc_set_pll_source(clock->pll_source);
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rcc_set_pll_multiplier(clock->pll_mul);
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// TODO - iff pll_div != 0, then maybe we're on a target that
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// has the dividers?
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/* Enable PLL oscillator and wait for it to stabilize. */
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rcc_osc_on(RCC_PLL);
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while (!rcc_is_osc_ready(RCC_PLL));
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/* Select PLL as SYSCLK source. */
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rcc_set_sysclk_source(RCC_CFGR_SW_PLL);
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rcc_wait_for_sysclk_status(RCC_PLL);
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/* Set the peripheral clock frequencies used. */
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rcc_ahb_frequency = clock->ahb_frequency;
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rcc_apb1_frequency = clock->apb1_frequency;
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rcc_apb2_frequency = clock->apb2_frequency;
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}
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static void setup_clocks(void)
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{
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rcc_clock_scale_t clock_full_hse8mhz ={
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.pll_mul = RCC_CFGR_PLLMUL_PLL_IN_CLK_X9,
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.pll_source = RCC_CFGR_PLLSRC_HSE_PREDIV,
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.hpre = RCC_CFGR_HPRE_DIV_NONE,
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.ppre1 = RCC_CFGR_PPRE1_DIV_2,
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.ppre2 = RCC_CFGR_PPRE2_DIV_NONE,
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.flash_config = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_2WS,
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.apb1_frequency = 36000000,
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.apb2_frequency = 72000000,
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.ahb_frequency = 72000000,
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};
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rcc_clock_setup_pll_f3_special(&clock_full_hse8mhz);
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}
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void usart2_exti26_isr(void)
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{
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ub_irq_handler();
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}
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int main(void)
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{
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int i;
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int j = 0;
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setup_clocks();
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/* Board led */
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rcc_periph_clock_enable(RCC_GPIOE);
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gpio_mode_setup(GPIOE, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO8);
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gpio_set(GPIOE, GPIO8);
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/* board init for uart2 on pa2/3 */
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rcc_periph_clock_enable(RCC_GPIOA);
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gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2|GPIO3);
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/* usart is AF7 */
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gpio_set_af(GPIOA, GPIO_AF7, GPIO2|GPIO3);
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struct ub_hw ub = {
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.uart = USART2,
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.uart_nvic = NVIC_USART2_EXTI26_IRQ,
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.uart_rcc = RCC_USART2,
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};
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ub_init(&ub);
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printf("hi guys!\n");
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while (1) {
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gpio_toggle(GPIOE, GPIO8);
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for (i = 0; i < 0x100000; i++) { /* Wait a bit. */
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__asm__("NOP");
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}
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ub_task();
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gpio_toggle(GPIOE, GPIO8);
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for (i = 0; i < 0x100000; i++) { /* Wait a bit. */
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__asm__("NOP");
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}
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}
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return 0;
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}
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63
tests/uart-basic/main-stm32f4-disco.c
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63
tests/uart-basic/main-stm32f4-disco.c
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/*
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* Oct 2017 Karl Palsson <karlp@tweak.net.au>
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*/
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#include <errno.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/usart.h>
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#include "uart-basic.h"
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#define LED_DISCO_GREEN_PORT GPIOD
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#define LED_DISCO_GREEN_PIN GPIO12
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void usart2_isr(void)
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{
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ub_irq_handler();
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}
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static void board_init(void) {
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rcc_periph_clock_enable(RCC_GPIOA);
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gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2|GPIO3);
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/* usart is AF7 */
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gpio_set_af(GPIOA, GPIO_AF7, GPIO2|GPIO3);
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}
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int main(void)
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{
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int i;
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int j = 0;
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rcc_clock_setup_hse_3v3(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
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rcc_periph_clock_enable(RCC_GPIOD);
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board_init();
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struct ub_hw ub = {
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.uart = USART2,
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.uart_nvic = NVIC_USART2_IRQ,
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.uart_rcc = RCC_USART2,
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};
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ub_init(&ub);
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printf("hi guys!\n");
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/* green led for ticking */
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gpio_mode_setup(LED_DISCO_GREEN_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE,
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LED_DISCO_GREEN_PIN);
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while (1) {
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gpio_toggle(LED_DISCO_GREEN_PORT, LED_DISCO_GREEN_PIN);
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for (i = 0; i < 0x800000; i++) { /* Wait a bit. */
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__asm__("NOP");
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}
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ub_task();
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gpio_toggle(LED_DISCO_GREEN_PORT, LED_DISCO_GREEN_PIN);
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for (i = 0; i < 0x800000; i++) { /* Wait a bit. */
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__asm__("NOP");
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}
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}
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return 0;
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}
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71
tests/uart-basic/uart-basic.c
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71
tests/uart-basic/uart-basic.c
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/*
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* Karl Palsson <karlp@tweak.net.au> Oct 2017
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* Considered to be available under your choice of:
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* BSD2 clause, Apache2, MIT, X11 or ISC licenses
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*/
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#include <errno.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/usart.h>
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#include "uart-basic.h"
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/* prototype to make linking happy */
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int _write(int file, char *ptr, int len);
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static struct ub_hw *ub;
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static uint8_t last_rxb;
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/* Implement _write for newlib to use printf */
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int _write(int file, char *ptr, int len)
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{
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int i;
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if (file == STDOUT_FILENO || file == STDERR_FILENO) {
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for (i = 0; i < len; i++) {
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if (ptr[i] == '\n') {
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usart_send_blocking(ub->uart, '\r');
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}
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usart_send_blocking(ub->uart, ptr[i]);
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}
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return i;
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}
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errno = EIO;
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return -1;
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}
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void ub_init(struct ub_hw *ub_input)
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{
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ub = ub_input;
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rcc_periph_clock_enable(ub->uart_rcc);
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usart_set_baudrate(ub->uart, 115200);
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usart_set_databits(ub->uart, 9);
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usart_set_stopbits(ub->uart, USART_STOPBITS_1);
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usart_set_mode(ub->uart, USART_MODE_TX_RX);
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usart_set_parity(ub->uart, USART_PARITY_EVEN);
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usart_set_flow_control(ub->uart, USART_FLOWCONTROL_NONE);
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usart_enable_rx_interrupt(ub->uart);
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nvic_enable_irq(ub->uart_nvic);
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usart_enable(ub->uart);
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}
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void ub_task(void)
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{
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if (last_rxb) {
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printf("Last rx char was: <%c>\n", last_rxb);
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last_rxb = 0;
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} else {
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printf("enter a character!\n");
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}
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}
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void ub_irq_handler(void)
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{
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if (usart_get_flag(ub->uart, USART_SR_RXNE)) {
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last_rxb = usart_recv(ub->uart);
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}
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}
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44
tests/uart-basic/uart-basic.h
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44
tests/uart-basic/uart-basic.h
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/*
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* Karl Palsson <karlp@tweak.net.au> Oct 2017
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* Considered to be available under your choice of:
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* BSD2 clause, Apache2, MIT, X11 or ISC licenses
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*/
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#pragma once
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#include <stdint.h>
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#include <libopencm3/stm32/usart.h>
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struct ub_hw {
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/** usart itself, eg USART2 */
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uint32_t uart;
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/** RCC_xxx flag for this usart, eg RCC_USART2 */
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uint32_t uart_rcc;
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/** eg NVIC_USART2_IRQ */
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uint32_t uart_nvic;
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Initialise the uart itself.
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* gpios are required to have been already configured as needed
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* @param ub
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*/
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void ub_init(struct ub_hw *ub);
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/**
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* Call this, it will "do stuff"
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*/
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void ub_task(void);
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/**
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* Call this from your board irq handler, it will "do the right thing"
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*/
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void ub_irq_handler(void);
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#ifdef __cplusplus
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}
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#endif
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