jaseg/olsndot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

i2c-master: use library form of transfer functions

Browse source
This commit is contained in:
Karl Palsson 2017-03-24 00:13:23 +00:00
parent f34641e25b
commit 6dfe47b399
2 changed files with 1 additions and 144 deletions
Download patch file Download diff file Expand all files Collapse all files

2
libopencm3

@ -1 +1 @@
Subproject commit f4a82997e3408135528c8736eddc79a29891b2e5
Subproject commit ab0488d4e835c2193c5d5ff5722beb28874142f7

143
tests/i2c-master/i2c-master.c
View file

@ -25,149 +25,6 @@ enum sht21_cmd_e {
/* 0xfa, 0x0f to read serial */
};
// ------------------ section proposed to go up to libopencm3
static void i2c_write7_v1(uint32_t i2c, int addr, uint8_t *data, size_t n)
{
#if defined(I2C_SR1)
while ((I2C_SR2(i2c) & I2C_SR2_BUSY)) {
}
i2c_send_start(i2c);
/* Wait for master mode selected */
while (!((I2C_SR1(i2c) & I2C_SR1_SB)
& (I2C_SR2(i2c) & (I2C_SR2_MSL | I2C_SR2_BUSY))));
i2c_send_7bit_address(i2c, addr, I2C_WRITE);
/* Waiting for address is transferred. */
while (!(I2C_SR1(i2c) & I2C_SR1_ADDR));
/* Cleaning ADDR condition sequence. */
uint32_t reg32 = I2C_SR2(i2c);
(void) reg32; /* unused */
size_t i;
for (i = 0; i < n; i++) {
i2c_send_data(i2c, data[i]);
while (!(I2C_SR1(i2c) & (I2C_SR1_BTF)));
}
#endif
}
static void i2c_read7_v1(uint32_t i2c, int addr, uint8_t *res, int n)
{
#if defined(I2C_SR1)
i2c_send_start(i2c);
i2c_enable_ack(i2c);
/* Wait for master mode selected */
while (!((I2C_SR1(i2c) & I2C_SR1_SB)
& (I2C_SR2(i2c) & (I2C_SR2_MSL | I2C_SR2_BUSY))));
i2c_send_7bit_address(i2c, addr, I2C_READ);
/* Waiting for address is transferred. */
while (!(I2C_SR1(i2c) & I2C_SR1_ADDR));
/* Clearing ADDR condition sequence. */
uint32_t reg32 = I2C_SR2(i2c);
(void) reg32; /* unused */
int i = 0;
for (i = 0; i < n; ++i) {
if (i == n - 1) {
i2c_disable_ack(i2c);
}
while (!(I2C_SR1(i2c) & I2C_SR1_RxNE));
res[i] = i2c_get_data(i2c);
}
i2c_send_stop(i2c);
return;
#endif
}
/* v1 isn't handling stop/start vs repeated start very well yet */
/* probably good enough to merge, but... maybe not put the v1 in the library.*/
static
void i2c_transfer7_v1(uint32_t i2c, uint8_t addr, uint8_t *w, size_t wn, uint8_t *r, size_t rn) {
if (wn) {
i2c_write7_v1(i2c, addr, w, wn);
}
if (rn) {
i2c_read7_v1(i2c, addr, r, rn);
} else {
i2c_send_stop(i2c);
}
}
static
void i2c_transfer7_v2(uint32_t i2c, uint8_t addr, uint8_t *w, size_t wn, uint8_t *r, size_t rn)
{
int wait;
size_t i;
/* waiting for busy is unnecessary. read the RM */
if (wn) {
i2c_set_7bit_address(i2c, addr);
i2c_set_write_transfer_dir(i2c);
i2c_set_bytes_to_transfer(i2c, wn);
if (rn) {
i2c_disable_autoend(i2c);
} else {
i2c_enable_autoend(i2c);
}
i2c_send_start(i2c);
while (wn--) {
wait = true;
while (wait) {
if (i2c_transmit_int_status(i2c)) {
wait = false;
}
while (i2c_nack(i2c)); /* FIXME Some error */
}
i2c_send_data(i2c, *w++);
}
/* not entirely sure this is really necessary.
* RM implies it will stall until it can write out the later bits
*/
if (rn) {
while (!i2c_transfer_complete(i2c));
}
}
if (rn) {
/*Setting transfer properties*/
i2c_set_7bit_address(i2c, addr);
i2c_set_read_transfer_dir(i2c);
i2c_set_bytes_to_transfer(i2c, rn);
/*start transfer*/
i2c_send_start(i2c);
/* important to do it afterwards to do a proper repeated start! */
i2c_enable_autoend(i2c);
for (i = 0; i < rn; i++) {
while (i2c_received_data(i2c) == 0);
r[i] = i2c_get_data(i2c);
}
}
}
static
void i2c_transfer7(uint32_t i2c, uint8_t addr, uint8_t *w, size_t wn, uint8_t *r, size_t rn)
{
#if defined I2C_SR2
i2c_transfer7_v1(i2c, addr, w, wn, r, rn);
#else
i2c_transfer7_v2(i2c, addr, w, wn, r, rn);
#endif
}
// --------------- end of upstream planned section
void i2cm_init(void)
{