Add nice plots

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jaseg 2024-09-19 17:07:52 +02:00
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@ -140,9 +140,13 @@ and other cooling components, which directly translates to a decrease in cost.
\section{Twisted Inductor Design}
We can approach twisted inductors by construction. Let us first consider a simple, planar, circular spiral coil with a
fixed pitch. We will ignore trace width for now, and consider the trace a thin wire. We will also ignore the placement
of the two electrical ports of the inductor for now. The trace trajectory of a standard planar spiral inductor can be
parameterized in polar coordinates $r, \phi$ based on an Archimedean spiral: \todo{For the lulz, cite Archimedes here}
fixed pitch. We will ignore trace width for now, and consider the trace a thin wire. We will assume the inductor's ports
are both located on the positive $x$-Axis. We can rotate it so its first port aligns with the $x$-Axis. To
minimize the loop area of the inductor's connections, inductors are usually designed with both ports close to one
another, so we can also assume its second port aligns with the $x$-Axis.
The trace trajectory of a standard planar spiral inductor can be parameterized in polar coordinates $r, \phi$ based on
an Archimedean spiral: \todo{For the lulz, cite Archimedes here}
\begin{equation}
r &= a\cdot\phi
@ -150,7 +154,9 @@ parameterized in polar coordinates $r, \phi$ based on an Archimedean spiral: \to
\end{equation}
An Archimedean spiral defined this way always starts at the origin, and it continues to infinity. Let us re-parameterize
this spiral taking into account that our spiral inductor has a defined inner radius $r_0$ and outer radius $r_1$, and a
this spiral to a curve parameter $t$ with range $\left[0,1\right]$.
inductor has a defined inner radius $r_0$ and outer radius $r_1$, and a
fixed turn count $n$. Let us further re-parameterize the spiral to a curve parameter $t$ with range $\left\[0,
1\right\]$. Taking into account that the input ports of a spiral inductor are usually placed on the outside of the
spiral, we define the inductor's first port to lie at $\left\(\phi, r\right\)=\left\(0, r_1\right\)$, and we define that

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