fw: add basic driver for high-g accelerometer
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jaseg
parent
08c1da4313
commit
e844dd5199
7 changed files with 192 additions and 14 deletions
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@ -125,7 +125,7 @@ CXXFLAGS += -I.
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LDFLAGS += $(ARCH_FLAGS) $(SYSTEM_FLAGS)
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LIBS += -lgcc
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LDFLAGS += -Wl,--gc-sections
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#LDFLAGS += -Wl,--gc-sections
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LINKMEM_FLAGS ?= --trim-stubs=startup.o --trace-sections .isr_vector --highlight-subdirs $(BUILDDIR)
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@ -38,13 +38,174 @@ void packetize(void *pkt, struct ll_pkt_trailer *trailer) {
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trailer->crc32 = pkt_crc(pkt, trailer);
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}
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enum mems_regs {
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MEMS_REG_CTRL0, /* 0 */
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MEMS_REG_CTRL1, /* 1 */
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MEMS_REG_CONFIG, /* 2 */
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MEMS_REG_STATUS0, /* 3 */
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MEMS_REG_STATUS1, /* 4 */
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MEMS_REG_STATUS2, /* 5 */
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MEMS_REG_CHIP_REVID, /* 6 */
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MEMS_REG_ACC_CHX_LOW, /* 7 */
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MEMS_REG_ACC_CHX_HIGH, /* 8 */
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MEMS_REG_ACC_CHY_LOW, /* 9 */
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MEMS_REG_ACC_CHY_HIGH, /* 10 */
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MEMS_REG_OSC_COUNTER, /* 11 */
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MEMS_REG_ID_SENSOR_TYPE, /* 12 */
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MEMS_REG_ID_VEH_MANUF, /* 13 */
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MEMS_REG_ID_SENSOR_MANUF, /* 14 */
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MEMS_REG_ID_LOT0, /* 15 */
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MEMS_REG_ID_LOT1, /* 16 */
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MEMS_REG_ID_LOT2, /* 17 */
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MEMS_REG_ID_LOT3, /* 18 */
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MEMS_REG_ID_WAFER, /* 19 */
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MEMS_REG_ID_COOR_X, /* 20 */
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MEMS_REG_ID_COOR_Y, /* 21 */
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MEMS_REG_RESET, /* 22 */
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MEMS_REG_OFF_CHX_HIGH, /* 23 */
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MEMS_REG_OFF_CHX_LOW, /* 24 */
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MEMS_REG_OFF_CHY_HIGH, /* 25 */
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MEMS_REG_OFF_CHY_LOW, /* 26 */
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};
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uint8_t crc8_calc(uint8_t *data, size_t len) {
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int acc = 0;
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for (size_t i=0; i<len; i++) {
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acc ^= data[i];
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for (size_t j=0; j<8; j++) {
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acc <<= 1;
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if (acc & 0x100) {
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acc ^= 0x197; /* 0x100 | poly */
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}
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}
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}
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if (acc & 0x100)
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asm volatile ("bkpt");
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return acc;
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}
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#define MEMS_OPCODE_Msk 0x3
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#define MEMS_OPCODE_Pos 30
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#define MEMS_ADDR_Msk 0x1f
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#define MEMS_ADDR_Pos 21
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#define MEMS_DATA_Msk 0xff
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#define MEMS_DATA_Pos 13
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#define MEMS_P_Pos 28
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#define MEMS_SEN_Pos 29
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#define MEMS_MEAS_Pos 12
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#define MEMS_MEAS_Msk 0x3fff
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bool parity_calc(uint8_t *data, size_t len) {
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bool acc = 0;
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for (size_t i=0; i<len; i++) {
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uint8_t b = data[i];
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for (size_t j=0; j<8; j++) {
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if (b&1) {
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acc = !acc;
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}
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b >>= 1;
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}
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}
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return acc;
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}
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uint32_t mems_trx_word(uint32_t data) {
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/* CAUTION: ST's SPI peripherals behave differently depending on DR register access size, yet the CMSIS headers
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* expose it as an 32-bit uint only. In this case, we actually want a 32-bit access.
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*/
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uint16_t *dr = (uint16_t *)&SPI1->DR;
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*dr = data>>16;
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while (SPI1->SR & SPI_SR_BSY)
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;
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uint32_t out = (*dr) << 16;
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*dr = data&0xffff;
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while (SPI1->SR & SPI_SR_BSY)
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;
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out |= *dr;
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return out;
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}
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uint32_t mems_trx_cmd(uint32_t cmd) {
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GPIOA->BRR = 1<<15; /* De-assert !CS */
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uint8_t bytes[3] = {(cmd>>16)&0xff, (cmd>>8)&0xff, cmd&0xff};
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uint8_t crc = crc8_calc(bytes, 3);
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int parity = !!parity_calc(bytes, 3);
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uint32_t out = mems_trx_word(cmd | (parity<<MEMS_P_Pos) | crc);
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GPIOA->BSRR = 1<<15; /* Assert !CS */
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return out;
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}
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void mems_write_reg(int addr, int val) {
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addr &= MEMS_ADDR_Msk;
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val &= MEMS_DATA_Msk;
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(void)mems_trx_cmd((1<<MEMS_OPCODE_Pos) | (addr<<MEMS_ADDR_Pos) | (val<<MEMS_DATA_Pos));
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}
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uint32_t mems_read_reg(int addr) {
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addr &= MEMS_ADDR_Msk;
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mems_trx_cmd((3<<MEMS_OPCODE_Pos) | (addr<<MEMS_ADDR_Pos));
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for (int i=0; i<2000; i++)
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asm volatile ("nop");
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uint32_t rv = mems_trx_cmd(3<<MEMS_OPCODE_Pos);
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return (rv >> MEMS_DATA_Pos) & MEMS_DATA_Msk;
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}
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int16_t mems_read_meas(int ch) {
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ch &= 3;
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mems_trx_cmd((ch<<MEMS_OPCODE_Pos) | (1<<MEMS_SEN_Pos));
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for (int i=0; i<2000; i++)
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asm volatile ("nop");
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uint32_t rv = mems_trx_cmd(3<<MEMS_OPCODE_Pos);
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/* shift 14-bit data left to align the MSB with the int16_t's sign bit */
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int16_t data = (rv >> MEMS_MEAS_Pos) << 2;
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/* Now do an arithmetic division to sign extend */
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return data / 4;
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}
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void mems_spi_init(void) {
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SPI1->CR1 = (6<<SPI_CR1_BR_Pos) | SPI_CR1_MSTR | SPI_CR1_SSM | SPI_CR1_SSI;
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SPI1->CR2 = (15<<SPI_CR2_DS_Pos);
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SPI1->CR1 |= SPI_CR1_SPE;
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}
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void mems_init(void) {
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mems_spi_init();
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for (size_t i=0; i<10000; i++) {
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asm volatile("nop");
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}
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/* Take accelerometer out of initialization phase */
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mems_write_reg(MEMS_REG_CTRL0, 0x01);
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}
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int main(void) {
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RCC->AHBENR |= RCC_AHBENR_GPIOAEN;
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RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
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RCC->APB2ENR |= RCC_APB2ENR_USART1EN | RCC_APB2ENR_SPI1EN;
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GPIOA->MODER |= (2 << GPIO_MODER_MODER9_Pos) | (2 << GPIO_MODER_MODER10_Pos);
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GPIOA->AFR[1] = (7 << (9-8)*4) | (7 << (10-8)*4);
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#define AFRL(pin, val) ((val) << ((pin)*4))
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#define AFRH(pin, val) ((val) << (((pin)-8)*4))
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#define AF(pin) (2<<(2*(pin)))
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#define OUT(pin) (1<<(2*(pin)))
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#define IN(pin) (0)
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#define ANALOG(pin) (3<<(2*(pin)))
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#define CLEAR(pin) (3<<(2*(pin)))
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/* GPIO pin config:
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* A9: USART 1 TX -> LED
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* A10: USART 1 RX -> debug
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* A15: Accelerometer CS
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* A5/6/7: SPI SCK/MISO/MOSI for Accelerometer
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*/
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GPIOA->MODER &= ~(CLEAR(15)); /* Clear JTAG TDI pin mode */
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GPIOA->MODER |= AF(9) | AF(10) | OUT(15) | AF(5) | AF(6) | AF(7);
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GPIOA->AFR[0] = AFRL(5, 5) | AFRL(6, 5) | AFRL(7, 5);
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GPIOA->AFR[1] = AFRH(9, 7) | AFRH(10, 7);
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GPIOA->BSRR = 1<<15; /* De-assert accelerometer !CS */
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SystemCoreClockUpdate();
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int apb2_clock = SystemCoreClock / APB2_PRESC;
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@ -56,6 +217,21 @@ int main(void) {
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USART1->CR2 |= USART_CR2_RXINV; //| USART_CR2_TXINV;
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USART1->CR1 |= USART_CR1_UE;
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/* FIXME DEUBG */
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while (1) {
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mems_init();
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for (int i=0; i<100000; i++)
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asm volatile("nop");
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for (int i=0; i<300; i++) {
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mems_read_meas(0);
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//mems_read_reg(MEMS_REG_ID_SENSOR_TYPE);
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for (int i=0; i<10000; i++)
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asm volatile("nop");
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}
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for (int i=0; i<100000; i++)
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asm volatile("nop");
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}
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int req_seq = 0;
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int res_seq = 0;
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struct req_pkt req_buf = { 0 };
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@ -118,7 +294,7 @@ int main(void) {
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} else {
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if (rc == sizeof(req_buf)) {
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crc32_t check_crc = pkt_crc(&req_buf, &req_buf.trailer);
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if (check_crc != req_buf.trailer.crc32 || check_crc == 0 || check_crc == -1) {
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if (check_crc != req_buf.trailer.crc32 || check_crc == 0 || (int)check_crc == -1) {
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rx_crc_error += 1;
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} else {
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req_seq = req_buf.req_seq;
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@ -1 +1 @@
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Subproject commit 89c567b2847e1d3349b3bec64c3efa76f1ccf982
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Subproject commit b5ef1c8ed36af2e46452e4c3f81506c65b5c0ede
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@ -2,6 +2,7 @@
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"board": {
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"active_layer": 36,
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"active_layer_preset": "All Layers",
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"auto_track_width": true,
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"hidden_nets": [],
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"high_contrast_mode": 0,
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"net_color_mode": 1,
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@ -50,17 +51,18 @@
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22,
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23,
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24,
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26,
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27,
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28,
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29,
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30,
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31,
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32,
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36,
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37
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33,
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37,
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38
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],
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"visible_layers": "fffffff_ffffffff"
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"visible_layers": "fffffff_ffffffff",
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"zone_display_mode": 0
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},
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"meta": {
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"filename": "rotor_base_pcb.kicad_prl",
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@ -66,7 +66,7 @@
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_too_small": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"hole_clearance": "error",
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@ -74,10 +74,9 @@
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"invalid_outline": "error",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"keepout": "error",
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"length_out_of_range": "error",
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"malformed_courtyard": "error",
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"microvia_drill_too_small": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"missing_footprint": "warning",
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"net_conflict": "warning",
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@ -95,7 +94,6 @@
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"via_hole_larger_than_pad": "error",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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@ -105,9 +103,11 @@
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_copper_edge_clearance": 0.01,
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"min_hole_clearance": 0.0,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_silk_clearance": 0.0,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.09999999999999999,
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"min_via_annular_width": 0.049999999999999996,
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