gerbonara/tests/resources/p-cad
2025-11-16 19:37:48 +01:00
..
LICENSE WIP move project to uv 2025-11-16 19:37:48 +01:00
README WIP move project to uv 2025-11-16 19:37:48 +01:00
SOURCE WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.DRL WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.GBL WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.GBO WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.GBS WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.GKO WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.GTL WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.GTO WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.GTS WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.gvp WIP move project to uv 2025-11-16 19:37:48 +01:00
ZXINET.zip WIP move project to uv 2025-11-16 19:37:48 +01:00

ZXINET.DRL - drill
ZXINET.GBL - bottom layer copper
ZXINET.GBO - bottom layer silk
ZXINET.GBS - bottom layer mask
ZXINET.GKO - board outline
ZXINET.GTL - top layer copper
ZXINET.GTO - top layer silk
ZXINET.GTS - top layer mask