Fix IPC-356 tests
This commit is contained in:
jaseg
parent
1304847afe
commit
d5bbfade80
4 changed files with 230 additions and 49 deletions
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@ -80,12 +80,16 @@ class FileSettings:
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def format_ipc_number(self, value, digits, key='', sign=False):
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if value is None:
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return ' ' * (digits + 1 + len(key))
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return ' ' * (digits + int(bool(sign)) + len(key))
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if isinstance(value, Enum):
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value = value.value
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num = format(round(value), f'{"+" if sign else ""}0{digits+int(bool(sign))}d')
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return key + format(round(value), f'{"+" if sign else ""}0{digits+1}d')
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if len(num) > digits + int(bool(sign)):
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raise ValueError('Error: Number {num} to wide for IPC-356 field of width {digits}')
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return key + num
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def format_ipc_length(self, value, digits, key='', unit=None, sign=False):
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if value is not None:
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@ -39,21 +39,28 @@ class Netlist(CamFile):
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self.adjacency = adjacency or {}
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self.params = params or {}
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def merge(self, other, our_net_prefix=None, their_net_prefix=None):
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def merge(self, other, our_prefix=None, their_prefix=None):
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''' Merge other netlist into this netlist. The respective net names are prefixed with the given prefixes
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(default: None). Garbles other. '''
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if not isinstance(other, Netlist):
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raise TypeError(f'Can only merge Netlist with other Netlist, not {type(other)}')
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self.prefix_nets(our_net_prefix)
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other.prefix_nets(our_net_prefix)
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self.prefix_nets(our_prefix)
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other.prefix_nets(our_prefix)
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self.test_records.extend(other.test_records)
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self.conductors.extend(other.conductors)
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self.outlines.extend(other.outlines)
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self.comments.extend(other.comments)
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self.adjacency.update(other.adjacency)
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self.params.extend(other.params)
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self.params.update(other.params)
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self.params['JOB'] = 'Gerbonara IPC-356 merge'
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self.params['TITLE'] = 'Gerbonara IPC-356 merge'
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for key in 'CODE', 'NUM', 'REV', 'VER':
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if key in self.params:
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del self.params[key]
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def prefix_nets(self, prefix):
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if not prefix:
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@ -68,10 +75,18 @@ class Netlist(CamFile):
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conductor.net_name = prefix + conductor.net_name
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new_adjacency = {}
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for key in adjacency:
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new_adjacency[prefix + key] = [ prefix + name for name in adjacency[key] ]
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for key in self.adjacency:
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new_adjacency[prefix + key] = [ prefix + name for name in self.adjacency[key] ]
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self.adjacency = new_adjacency
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def offset(self, dx=0, dy=0, unit=MM):
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# FIXME
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pass
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def rotate(self, angle:'radian', center=(0,0), unit=MM):
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# FIXME
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pass
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@property
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def objects(self):
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yield from self.test_records
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@ -117,18 +132,18 @@ class Netlist(CamFile):
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yield f'P {name} {value!s}'
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net_name_map = {
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f'NNAME{i}': name for i, name in enumerate(
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name: f'NNAME{i}' for i, name in enumerate(
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name for name in self.net_names() if len(name) > 14
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) }
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yield 'C'
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yield 'C Net name mapping:'
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yield 'C'
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for name, value in net_name_map.items():
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yield f'P {name} {value!s}'
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for name, alias in net_name_map.items():
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yield f'P {alias} {name}'
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yield 'C'
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yield 'C Test records:'
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yield 'C Test records:'
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yield 'C'
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for record in self.test_records:
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@ -136,21 +151,21 @@ class Netlist(CamFile):
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if self.conductors:
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yield 'C'
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yield 'C Conductors:'
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yield 'C Conductors:'
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yield 'C'
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for conductor in self.conductors:
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yield from conductor.format(settings, net_name_map)
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if self.outlines:
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yield 'C'
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yield 'C Outlines:'
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yield 'C Outlines:'
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yield 'C'
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for outline in self.outlines:
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yield from outline.format(settings)
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if self.adjacency:
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yield 'C'
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yield 'C Adjacency data:'
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yield 'C Adjacency data:'
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yield 'C'
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done = set()
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for net, others in self.adjacency.items():
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@ -217,6 +232,7 @@ class NetlistParser(object):
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self.adjacency = {}
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self.outlines = []
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self.eof = False
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self.generator = None
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def warn(self, msg, kls=SyntaxWarning):
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warnings.warn(f'{self.filename}:{self.start_line}: {msg}', kls)
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@ -255,16 +271,34 @@ class NetlistParser(object):
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return
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if self.eof:
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warnings.warn('Data following IPC-356 End Of File marker')
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self.warn('Data following IPC-356 End Of File marker')
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if line[0] == 'C':
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line = line[2:].strip()
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# +-- sic!
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# v
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if 'Ouptut' in line and 'Allegro' in line:
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self.generator = 'allegro'
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elif 'Ouptut' not in line and 'Allegro' in line:
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self.warn('This seems to be a file generated by a newer allegro version. Please raise an issue on our '
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'issue tracker with your Allegro version and if possible please provide an example file '
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'so we can improve Gerbonara!')
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elif 'EAGLE' in line and 'CadSoft' in line:
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self.generator = 'eagle'
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if line.strip().startswith('NNAME'):
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name, *value = line.strip().split()
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value = ' '.join(value)
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warnings.warn('File contains non-standard Allegro-style net name alias definitions in comments.')
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self.net_names[name] = value
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self.warn('File contains non-standard Allegro-style net name alias definitions in comments.')
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if self.generator == 'allegro':
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# it's amazing how allegro always seems to have found a way to do the same thing everyone else is
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# doing just in a different, slightly more messed up, completely incompatible way.
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self.net_names[name] = value[5:] # strip NNAME because Allegro
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else:
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self.net_names[name] = value
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else:
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self.comments.append(line)
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@ -294,7 +328,11 @@ class NetlistParser(object):
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raise SyntaxError(f'Unsupported IPC-356 netlist unit specification "{line}"')
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elif name.startswith('NNAME'):
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self.net_names[name] = value
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if self.generator == 'allegro':
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self.net_names[name] = value[5:]
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else:
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self.net_names[name] = value
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else:
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self.params[name] = value
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@ -319,10 +357,10 @@ class NetlistParser(object):
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elif line[0:3] == '389':
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self.assert_unit()
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self.outlines.append(Outline.parse(line, self.settings))
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self.outlines.extend(Outline.parse(line, self.settings))
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else:
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warnings.warn(f'Unknown IPC-356 record type {line[0:3]}')
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self.warn(f'Unknown IPC-356 record type {line[0:3]}')
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class PadType(Enum):
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@ -345,6 +383,7 @@ class TestRecord:
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__test__ = False # tell pytest to ignore this class
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pad_type : PadType = None
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net_name : str = None
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is_connected : bool = True # None, True or False.
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ref_des : str = None # part reference designator, e.g. "C1" or "U69"
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is_via : bool = False
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pin_num : int = None
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@ -356,10 +395,11 @@ class TestRecord:
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y : float = None
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w : float = None
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h : float = None
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rotation : float = None
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rotation : float = 0
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solder_mask : SoldermaskInfo = None
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lefover : str = None
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unit: KW_ONLY = None
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_ : KW_ONLY
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unit : LengthUnit = None
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def __str__(self):
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x = self.unit.format(self.x)
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@ -373,9 +413,23 @@ class TestRecord:
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obj.unit = settings.unit
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obj.pad_type = PadType(int(line[1]))
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net_name = line[3:17].strip() or None
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obj.net_name = net_name_map.get(net_name, net_name)
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obj.ref_des = line[20:26].strip() or None
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if net_name == 'N/C':
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obj.net_name = None
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obj.is_connected = False
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else:
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obj.net_name = net_name_map.get(net_name, net_name)
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obj.is_connected = True
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ref_des = line[20:26].strip() or None
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if ref_des == 'VIA':
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obj.is_via = True
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obj.ref_des = None
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else:
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obj.is_via = False
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obj.ref_des = ref_des
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obj.pin = line[27:31].strip() or None
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if line[31] == 'M':
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@ -395,21 +449,26 @@ class TestRecord:
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if line[62] == 'Y':
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obj.h = settings.parse_ipc_length(line[63:67])
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if line[67] == 'R':
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obj.h = math.radians(int(line[68:71]))
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obj.rotation = math.radians(int(line[68:71]))
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else:
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obj.rotation = 0
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if line[72] == 'S':
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obj.solder_mask = SoldermaskInfo(int(line[73]))
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obj.leftover = line[74:].strip() or None
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return obj
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def format(self, settings, net_name_map):
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def format(self, settings, net_name_map={}):
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x = settings.unit(self.x, self.unit)
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y = settings.unit(self.y, self.unit)
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w = settings.unit(self.w, self.unit)
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h = settings.unit(self.h, self.unit)
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# TODO: raise warning if any string is too long
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ref_des = 'VIA' if self.is_via else (self.ref_des or '')
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net_name = net_name_map.get(self.net_name, self.net_name)
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if self.is_connected:
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net_name = net_name_map.get(self.net_name, self.net_name)
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else:
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net_name = 'N/C'
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yield ''.join((
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'3',
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@ -427,7 +486,7 @@ class TestRecord:
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settings.format_ipc_length(self.x, 6, 'X', self.unit, sign=True),
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settings.format_ipc_length(self.y, 6, 'Y', self.unit, sign=True),
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settings.format_ipc_length(self.w, 4, 'X', self.unit),
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settings.format_ipc_length(self.y, 4, 'Y', self.unit),
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settings.format_ipc_length(self.h, 4, 'Y', self.unit),
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settings.format_ipc_number(math.degrees(self.rotation) if self.rotation is not None else None, 3, 'R'),
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' ',
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settings.format_ipc_number(self.solder_mask, 1, 'S'),
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@ -445,7 +504,7 @@ def parse_coord_chain(line, settings):
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for segment in line.split('*'):
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coords = []
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for coord in segment.strip().split():
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if not (m := re.match(r'(X[+-]?[0-9]+)?(Y[+-]?[0-9]+)?', coord)):
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if not (match := re.match(r'(X[+-]?[0-9]+)?(Y[+-]?[0-9]+)?', coord)):
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raise SyntaxError(f'Invalid IPC-356 coordinate {coord}')
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x = settings.parse_ipc_length(match[1], x)
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@ -457,17 +516,17 @@ def parse_coord_chain(line, settings):
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coords.append((x, y))
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yield coords
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def format_coord_chain(line, settings, coords, cont):
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def format_coord_chain(line, settings, coords, cont, unit):
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for x, y in coords:
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coord = settings.format_ipc_length(x, 6, 'X', unit=self.unit, sign=True)
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coord += settings.format_ipc_length(y, 6, 'Y', unit=self.unit, sign=True)
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coord = settings.format_ipc_length(x, 6, 'X', unit=unit, sign=True)
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coord += settings.format_ipc_length(y, 6, 'Y', unit=unit, sign=True)
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if len(line) + len(coord) <= 80:
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line += coord
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line = (line + coord + ' ')[:80]
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else:
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yield line
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line = f'{cont} {coord}'
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line = f'{cont} {coord} '
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yield line
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@ -475,17 +534,20 @@ def format_coord_chain(line, settings, coords, cont):
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class Outline:
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outline_type : OutlineType
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outline : [(float,)]
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unit : KW_ONLY
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_ : KW_ONLY
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unit : LengthUnit = None
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@classmethod
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def parse(kls, line, settings):
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print('parsing outline', line)
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outline_type = OutlineType[line[3:17].strip()]
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for outline in parse_coord_chain(line[22:], settings):
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print(' ->', outline)
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yield kls(outline_type, outline, unit=settings.unit)
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def format(self, settings):
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line = f'389{self.outline_type.name:<14} '
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yield from format_coord_chain(line, settings, self.outline, '089')
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yield from format_coord_chain(line, settings, self.outline, '089', self.unit)
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def __str__(self):
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return f'<IPC-356 {self.outline_type.name} outline with {len(self.outline)} points>'
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@ -497,7 +559,8 @@ class Conductor:
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layer : int
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aperture : (float,)
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coords : [(float,)]
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unit : KW_ONLY
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_ : KW_ONLY
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unit : LengthUnit = None
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@classmethod
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def parse(kls, line, settings, net_name_map={}):
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@ -520,7 +583,7 @@ class Conductor:
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net_name = net_name_map.get(self.net_name, self.net_name)
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net_name = f'{net_name:<14}[:14]'
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line = f'378{net_name} L{self.layer:02d} '
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yield from format_coord_chain(line, settings, self.outline, '078')
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yield from format_coord_chain(line, settings, self.outline, '078', self.unit)
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def __str__(self):
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return f'<IPC-356 conductor {self.net_name} with {len(self.coords)} points>'
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@ -32,10 +32,18 @@ def test_idempotence(reference, tmpfile):
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tmp_1 = tmpfile('First generation output', '.ipc')
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tmp_2 = tmpfile('Second generation output', '.ipc')
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Netlist.open(reference).save(tmp_1)
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Netlist.open(tmp_1).save(tmp_2)
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a = Netlist.open(reference)
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a.save(tmp_1)
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b = Netlist.open(tmp_1)
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b.save(tmp_2)
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assert tmp_1.read_text() == tmp_2.read_text()
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print(f'{a.outlines=}')
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print(f'{b.outlines=}')
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res = tmp_1.read_text() == tmp_2.read_text()
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# Confuse pytest so it doesn't try to print out a diff. pytest's potato diff algorithm is wayyyy to slow and would
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# hang for several minutes.
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assert res
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@filter_syntax_warnings
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@pytest.mark.parametrize('reference', REFERENCE_FILES, indirect=True)
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@ -50,12 +58,118 @@ def test_bells_and_whistles(reference):
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netlist.conductors_by_layer(0)
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@filter_syntax_warnings
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@pytest.mark.parametrize('reference', REFERENCE_FILES, indirect=True)
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@pytest.mark.parametrize('other', REFERENCE_FILES, indirect=True)
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def test_merge(reference, other):
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other = reference_path(other)
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a = Netlist.open(reference)
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b = Netlist.open(other)
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@pytest.mark.parametrize('a', REFERENCE_FILES)
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@pytest.mark.parametrize('b', REFERENCE_FILES)
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def test_merge(a, b):
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a, b = reference_path(a), reference_path(b)
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print('File A:', a)
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print('File B:', a)
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a = Netlist.open(a)
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b = Netlist.open(b)
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a.merge(b, our_prefix='A')
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# FIXME asserts
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def test_record_semantics():
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settings = FileSettings()
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r = TestRecord.parse('327m0002 CPU1 -AY30 A01X+020114Y+014930X0120Y R090 S1 ', settings)
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assert r.pad_type == PadType.SMD_PAD
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assert r.net_name == 'm0002'
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assert r.is_connected
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assert r.ref_des == 'CPU1'
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assert not r.is_via
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assert r.pin == 'AY30'
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assert not r.is_middle
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assert r.hole_dia is None
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assert r.is_plated is None
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assert r.access_layer == 1
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assert math.isclose(r.x, 20114/1000) and math.isclose(r.y, 14930/1000)
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assert math.isclose(r.w, 120/1000) and r.h is None
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assert math.isclose(r.rotation, math.pi/2)
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assert r.solder_mask == SoldermaskInfo.PRIMARY
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assert r.unit == settings.unit
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r = TestRecord.parse('327m0002 U15 -D3 A01X+011545Y+003447X0090Y R090 S1 ', settings)
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assert r.pad_type == PadType.SMD_PAD
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assert r.net_name == 'm0002'
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assert r.is_connected
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assert r.ref_des == 'U15'
|
||||
assert r.pin == 'D3'
|
||||
assert not r.is_middle
|
||||
assert r.hole_dia is None
|
||||
assert r.is_plated is None
|
||||
assert r.access_layer == 1
|
||||
assert math.isclose(r.w, 90/1000) and r.h is None
|
||||
|
||||
r = TestRecord.parse('327VSUMPG C39 -2 M A01X+013050Y+020050X0350Y0320R270 S1 ', settings)
|
||||
assert r.pad_type == PadType.SMD_PAD
|
||||
assert r.net_name == 'VSUMPG'
|
||||
assert r.is_connected
|
||||
assert r.ref_des == 'C39'
|
||||
assert r.pin == '2'
|
||||
assert r.is_middle
|
||||
assert r.hole_dia is None
|
||||
assert r.is_plated is None
|
||||
assert r.access_layer == 1
|
||||
assert math.isclose(r.w, 350/1000) and math.isclose(r.h, 320/1000)
|
||||
assert math.isclose(r.rotation, math.pi*3/2)
|
||||
|
||||
r = TestRecord.parse('327N/C CPU1 -AD2 A01X+023191Y+020393X0110Y R090 S1 ', settings)
|
||||
assert r.pad_type == PadType.SMD_PAD
|
||||
assert r.net_name == None
|
||||
assert not r.is_connected
|
||||
assert r.ref_des == 'CPU1'
|
||||
assert r.pin == 'AD2'
|
||||
assert r.hole_dia is None
|
||||
assert r.is_plated is None
|
||||
assert r.access_layer == 1
|
||||
assert math.isclose(r.w, 110/1000) and r.h is None
|
||||
|
||||
r = TestRecord.parse('317m0002 VIA - MD0080PA00X+011900Y+004000X0160Y S3 ', settings)
|
||||
assert r.pad_type == PadType.THROUGH_HOLE
|
||||
assert r.net_name == 'm0002'
|
||||
assert r.is_connected
|
||||
assert r.ref_des is None
|
||||
assert r.is_via
|
||||
assert r.pin is None
|
||||
assert r.is_middle
|
||||
assert r.hole_dia == 80/1000
|
||||
assert r.is_plated
|
||||
assert r.access_layer == 0
|
||||
assert math.isclose(r.w, 160/1000) and r.h is None
|
||||
assert r.rotation == 0
|
||||
assert r.solder_mask == SoldermaskInfo.BOTH
|
||||
|
||||
r = TestRecord.parse('317GND VIA - MD0080PA00X+023800Y+010100X0160Y S0 ', settings)
|
||||
assert r.pad_type == PadType.THROUGH_HOLE
|
||||
assert r.net_name == 'GND'
|
||||
assert r.is_connected
|
||||
assert r.is_via
|
||||
assert r.pin is None
|
||||
assert r.hole_dia == 80/1000
|
||||
assert r.is_plated
|
||||
assert r.access_layer == 0
|
||||
assert r.solder_mask == SoldermaskInfo.NONE
|
||||
|
||||
def test_record_idempotence():
|
||||
records = [
|
||||
'327m0002 CPU1 -AY30 A01X+020114Y+014930X0120Y R090 S1 ',
|
||||
'327m0002 U15 -D3 A01X+011545Y+003447X0090Y R090 S1 ',
|
||||
'327VSUMPG C39 -2 M A01X+013050Y+020050X0350Y0320R270 S1 ',
|
||||
'317m0002 VIA - MD0080PA00X+011900Y+004000X0160Y S3 ',
|
||||
'317GND VIA - MD0080PA00X+023800Y+010100X0160Y S0 ',]
|
||||
|
||||
for unit in MM, Inch:
|
||||
settings = FileSettings(unit=unit)
|
||||
for record in records:
|
||||
ra = TestRecord.parse(record, settings)
|
||||
a = list(ra.format(settings))[0]
|
||||
rb = TestRecord.parse(a, settings)
|
||||
b = list(rb.format(settings))[0]
|
||||
print('ra', ra)
|
||||
print('rb', rb)
|
||||
print('0', record)
|
||||
print('a', a)
|
||||
print('b', b)
|
||||
assert a == b
|
||||
|
||||
|
|
|
|||
|
|
@ -76,7 +76,7 @@ class LengthUnit:
|
|||
return unit.convert_from(self, value)
|
||||
|
||||
def format(self, value):
|
||||
return f'{value:.3f}{self.shorthand}'
|
||||
return f'{value:.3f}{self.shorthand}' if value is not None else ''
|
||||
|
||||
def __call__(self, value, unit):
|
||||
return self.convert_from(unit, value)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue