136 lines
4.5 KiB
C
136 lines
4.5 KiB
C
/* Megumin LED display firmware
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* Copyright (C) 2018 Sebastian Götte <code@jaseg.net>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "adc.h"
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#include "serial.h"
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#include <stdbool.h>
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#include <stdlib.h>
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#include <assert.h>
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static struct __attribute__((__packed__)) hl_adc_pkt {
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struct ll_pkt ll;
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uint16_t seq;
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int32_t gps_1pps_period_sysclk;
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volatile uint16_t data[32];
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} adc_pkt[2];
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static uint16_t current_seq = 0;
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static int current_buf = 0;
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static void adc_dma_init(void);
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static void adc_dma_launch(void);
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/* Mode that can be used for debugging */
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void adc_init() {
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adc_dma_init();
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/* Clock from PCLK/4 instead of the internal exclusive high-speed RC oscillator. */
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ADC1->CFGR2 = (2<<ADC_CFGR2_CKMODE_Pos); /* Use PCLK/4=12MHz */
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/* Sampling time 239.5 ADC clock cycles -> total conversion time 38.5us*/
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ADC1->SMPR = (7<<ADC_SMPR_SMP_Pos);
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/* Setup DMA and triggering */
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/* Trigger from TIM1 TRGO */
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ADC1->CFGR1 = ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG | (2<<ADC_CFGR1_EXTEN_Pos) | (1<<ADC_CFGR1_EXTSEL_Pos);
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ADC1->CHSELR = ADC_CHSELR_CHSEL2;
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/* Perform self-calibration */
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ADC1->CR |= ADC_CR_ADCAL;
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while (ADC1->CR & ADC_CR_ADCAL)
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;
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/* Enable conversion */
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ADC1->CR |= ADC_CR_ADEN;
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ADC1->CR |= ADC_CR_ADSTART;
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}
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static void adc_dma_init() {
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/* Configure DMA 1 Channel 1 to get rid of all the data */
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DMA1_Channel1->CPAR = (unsigned int)&ADC1->DR;
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DMA1_Channel1->CCR = (0<<DMA_CCR_PL_Pos);
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DMA1_Channel1->CCR |=
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(1<<DMA_CCR_MSIZE_Pos) /* 16 bit */
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| (1<<DMA_CCR_PSIZE_Pos) /* 16 bit */
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| DMA_CCR_MINC
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| DMA_CCR_TCIE; /* Enable transfer complete interrupt. */
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/* triggered on half-transfer and on transfer completion. We use this to send out the ADC data and to trap into GDB. */
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NVIC_EnableIRQ(DMA1_Channel1_IRQn);
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NVIC_SetPriority(DMA1_Channel1_IRQn, 2<<5);
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adc_dma_launch();
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}
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void adc_dma_launch() {
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DMA1_Channel1->CCR &= ~DMA_CCR_EN; /* Disable channel */
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current_buf = !current_buf;
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DMA1_Channel1->CMAR = (unsigned int)&(adc_pkt[current_buf].data);
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DMA1_Channel1->CNDTR = ARRAY_LEN(adc_pkt[current_buf].data);
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DMA1_Channel1->CCR |= DMA_CCR_EN; /* Enable channel */
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}
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void adc_timer_init(int psc, int ivl) {
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TIM1->BDTR = TIM_BDTR_MOE; /* MOE is needed even though we only "output" a chip-internal signal */
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TIM1->CCMR2 = (6<<TIM_CCMR2_OC4M_Pos); /* PWM Mode 1 to get a clean trigger signal */
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TIM1->CCER = TIM_CCER_CC4E; /* Enable capture/compare unit 4 connected to ADC */
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TIM1->CCR4 = 1; /* Trigger at start of timer cycle */
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/* Set prescaler and interval */
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TIM1->PSC = psc-1;
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TIM1->ARR = ivl-1;
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/* Preload all values */
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TIM1->EGR = TIM_EGR_UG;
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TIM1->CR1 = TIM_CR1_ARPE;
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/* And... go! */
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TIM1->CR1 |= TIM_CR1_CEN;
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}
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/* This acts as a no-op that provides a convenient point to set a breakpoint for the debug scope logic */
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static void gdb_dump(void) {
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}
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void DMA1_Channel1_IRQHandler(void) {
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uint32_t isr = DMA1->ISR;
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/* Clear the interrupt flag */
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DMA1->IFCR |= DMA_IFCR_CGIF1;
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adc_dma_launch();
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gdb_dump();
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adc_pkt[!current_buf].seq = current_seq++;
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adc_pkt[!current_buf].gps_1pps_period_sysclk = gps_1pps_period_sysclk;
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/* Ignore return value since we can't do anything here. Overruns are logged in serial.c. */
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usart_send_packet_nonblocking(&adc_pkt[!current_buf].ll, sizeof(adc_pkt[!current_buf]));
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/*
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static int debug_buf_pos = 0;
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if (st->sync) {
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if (debug_buf_pos < NCH) {
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debug_buf_pos = NCH;
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} else {
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adc_buf[debug_buf_pos++] = symbol;
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if (debug_buf_pos >= sizeof(adc_buf)/sizeof(adc_buf[0])) {
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debug_buf_pos = 0;
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st->sync = 0;
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gdb_dump();
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for (int i=0; i<sizeof(adc_buf)/sizeof(adc_buf[0]); i++)
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adc_buf[i] = -255;
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}
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}
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}
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*/
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}
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