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Fix serial

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This commit is contained in:
jaseg 2020-03-16 19:19:34 +01:00
parent fed186a49f
commit a1dc923315
14 changed files with 447 additions and 41 deletions
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78
controller/fw/src/main.c
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@ -6,15 +6,25 @@
#include <math.h>
#include <stm32f407xx.h>
#include <stm32f4_isr.h>
#include "sr_global.h"
#include "adc.h"
#include "spi_flash.h"
#include "freq_meas.h"
#include "dsss_demod.h"
#include "con_usart.h"
static struct spi_flash_if spif;
unsigned int sysclk_speed = 0;
unsigned int apb1_speed = 0;
unsigned int apb2_speed = 0;
unsigned int auxclk_speed = 0;
unsigned int apb1_timer_speed = 0;
unsigned int apb2_timer_speed = 0;
struct leds leds;
void __libc_init_array(void) { /* we don't need this. */ }
void __assert_func (unused_a const char *file, unused_a int line, unused_a const char *function, unused_a const char *expr) {
@ -24,14 +34,14 @@ void __assert_func (unused_a const char *file, unused_a int line, unused_a const
static void clock_setup(void)
{
/* 8MHz HSE clock as PLL source.
*
* Divide by 8 -> 1 MHz */
/* 8MHz HSE clock as PLL source. */
#define HSE_SPEED 8000000
/* Divide by 8 -> 1 MHz */
#define PLL_M 8
/* Multiply by 336 -> 336 MHz VCO frequency */
#define PLL_N 336
/* Divide by 4 -> 84 MHz (max freq for our chip) */
#define PLL_P 4
#define PLL_P 2
/* Aux clock for USB OTG, SDIO, RNG: divide VCO frequency (336 MHz) by 7 -> 48 MHz (required by USB OTG) */
#define PLL_Q 7
@ -54,10 +64,10 @@ static void clock_setup(void)
/* set AHB prescaler to /1 (CFGR:bits 7:4) */
RCC->CFGR |= (0 << RCC_CFGR_HPRE_Pos);
/* set ABP1 prescaler to 2 -> 42MHz */
RCC->CFGR |= (4 << RCC_CFGR_PPRE1_Pos);
/* set ABP2 prescaler to 1 -> 84MHz */
RCC->CFGR |= (0 << RCC_CFGR_PPRE2_Pos);
/* set ABP1 prescaler to 4 -> 42MHz */
RCC->CFGR |= (5 << RCC_CFGR_PPRE1_Pos);
/* set ABP2 prescaler to 2 -> 84MHz */
RCC->CFGR |= (4 << RCC_CFGR_PPRE2_Pos);
if (RCC->CR & RCC_CR_PLLON)
asm volatile ("bkpt");
@ -79,6 +89,13 @@ static void clock_setup(void)
| RCC_PLLCFGR_PLLSRC; /* select HSE as PLL source */
RCC->CR |= RCC_CR_PLLON;
sysclk_speed = HSE_SPEED / PLL_M * PLL_N / PLL_P;
auxclk_speed = HSE_SPEED / PLL_M * PLL_N / PLL_Q;
apb1_speed = sysclk_speed / 4;
apb1_timer_speed = apb1_speed * 2;
apb2_speed = sysclk_speed / 2;
apb2_timer_speed = apb2_speed * 2;
/* Wait for main PLL */
while(!(RCC->CR & RCC_CR_PLLRDY))
;
@ -170,7 +187,7 @@ int main(void)
GPIOC->MODER &= ~GPIO_MODER_MODER9_Msk;
GPIOC->MODER |= (2<<GPIO_MODER_MODER9_Pos);
GPIOC->AFR[1] &= ~GPIO_AFRH_AFSEL9_Msk;
GPIOC->OSPEEDR |= (3<<GPIO_OSPEEDR_OSPEED9_Pos); /* SCK */
GPIOC->OSPEEDR |= (3<<GPIO_OSPEEDR_OSPEED9_Pos);
RCC->CFGR |= (6<<RCC_CFGR_MCO2PRE_Pos) | (3<<RCC_CFGR_MCO2_Pos);
#endif
@ -179,6 +196,9 @@ int main(void)
}
clock_setup();
con_usart_init();
con_printf("\033[2J\033[HBooting...\r\n");
led_setup();
spi_flash_setup();
adc_init();
@ -190,30 +210,38 @@ int main(void)
GPIOA->AFR[1] &= ~GPIO_AFRH_AFSEL8_Msk;
GPIOA->AFR[1] |= 1<<GPIO_AFRH_AFSEL8_Pos;
GPIOA->MODER |= (1<<GPIO_MODER_MODER9_Pos) | (1<<GPIO_MODER_MODER10_Pos) | (1<<GPIO_MODER_MODER11_Pos) |
(1<<GPIO_MODER_MODER12_Pos) | (1<<GPIO_MODER_MODER15_Pos);
GPIOA->MODER |= (1<<GPIO_MODER_MODER11_Pos) | (1<<GPIO_MODER_MODER12_Pos) | (1<<GPIO_MODER_MODER15_Pos);
#endif
con_printf("Booted.\r\n");
while (23) {
if (adc_fft_buf_ready_idx != -1) {
GPIOA->BSRR = 1<<9;
GPIOA->BSRR = 1<<11;
adc_fft_buf_ready_idx = !adc_fft_buf_ready_idx; /* DEBUG */
memcpy(adc_fft_buf[!adc_fft_buf_ready_idx], adc_fft_buf[adc_fft_buf_ready_idx] + FMEAS_FFT_LEN/2, sizeof(adc_fft_buf[0][0]) * FMEAS_FFT_LEN/2);
GPIOA->BSRR = 1<<9<<16;
GPIOA->BSRR = 1<<11;
GPIOA->BSRR = 1<<11<<16;
GPIOA->BSRR = 1<<11;
float out;
if (adc_buf_measure_freq(adc_fft_buf[adc_fft_buf_ready_idx], &out)) {
con_printf("%012d: measurement error\r\n", freq_sample_ts);
measurement_errors++;
GPIOA->BSRR = 1<<7;
debug_last_freq = NAN;
} else {
debug_last_freq = out;
con_printf("%012d: %2d.%03d Hz\r\n", freq_sample_ts, (int)out, (int)(out * 1000) % 1000);
/* frequency ok led */
if (48 < out && out < 52)
GPIOA->BSRR = 1<<7<<16;
else
GPIOA->BSRR = 1<<7;
/*
GPIOA->BSRR = 1<<12;
dsss_demod_init(&demod_state);
dsss_demod_step(&demod_state, out, freq_sample_ts);
*/
GPIOA->BSRR = 1<<12<<16;
}
GPIOA->BSRR = 1<<11<<16;
@ -226,38 +254,38 @@ int main(void)
}
void NMI_Handler(void) {
asm volatile ("bkpt");
asm volatile ("bkpt #1");
}
void HardFault_Handler(void) {
asm volatile ("bkpt");
asm volatile ("bkpt #2");
}
void MemManage_Handler(void) {
asm volatile ("bkpt");
asm volatile ("bkpt #3");
}
void BusFault_Handler(void) {
asm volatile ("bkpt");
asm volatile ("bkpt #4");
}
void UsageFault_Handler(void) {
asm volatile ("bkpt");
asm volatile ("bkpt #5");
}
void SVC_Handler(void) {
asm volatile ("bkpt");
asm volatile ("bkpt #6");
}
void DebugMon_Handler(void) {
asm volatile ("bkpt");
asm volatile ("bkpt #7");
}
void PendSV_Handler(void) {
asm volatile ("bkpt");
asm volatile ("bkpt #8");
}
void SysTick_Handler(void) {
asm volatile ("bkpt");
asm volatile ("bkpt #9");
}