jaseg/ihsm-tx-coil-test-fw
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Updates for testing

Browse source
This commit is contained in:
jaseg 2023-08-25 13:13:55 +02:00
parent 6af143dd8f
commit f06af33ad2
1 changed files with 5 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

10
src/main.c
View file

@ -47,12 +47,12 @@ int main(void) {
GPIOB->AFR[1] |= AFRH(13, 6) | AFRH(14, 6); GPIOB->AFR[1] |= AFRH(13, 6) | AFRH(14, 6);
GPIOB->OSPEEDR |= OSPEED(13, 3) | OSPEED(14, 3); GPIOB->OSPEEDR |= OSPEED(13, 3) | OSPEED(14, 3);
TIM1->CCMR1 = (6<<TIM_CCMR1_OC1M_Pos) | (7<<TIM_CCMR1_OC2M_Pos); TIM1->CCMR1 = (6<<TIM_CCMR1_OC1M_Pos) | (7<<TIM_CCMR1_OC2M_Pos);
TIM1->CCER = TIM_CCER_CC1E | TIM_CCER_CC1NE | TIM_CCER_CC2E | TIM_CCER_CC2NE; TIM1->CCER = TIM_CCER_CC1E | TIM_CCER_CC1NE; // | TIM_CCER_CC2E | TIM_CCER_CC2NE;
TIM1->PSC = 0; TIM1->PSC = 0;
TIM1->ARR = 168*3; TIM1->ARR = 1292; /* 130 kHz */
TIM1->CCR1 = TIM1->ARR/2; TIM1->CCR1 = TIM1->ARR/8;
TIM1->CCR2 = TIM1->ARR/2; TIM1->CCR2 = TIM1->ARR - TIM1->ARR/8;
TIM1->BDTR = TIM_BDTR_MOE | (64<<TIM_BDTR_DTG_Pos); TIM1->BDTR = TIM_BDTR_MOE | (128<<TIM_BDTR_DTG_Pos);
TIM1->CR1 = TIM_CR1_CEN; TIM1->CR1 = TIM_CR1_CEN;
//GPIOA->MODER |= OUT(8) | OUT(9); //GPIOA->MODER |= OUT(8) | OUT(9);