First mainboard layout draft done
Still missing: mesh hookup, layer interconnect, optical link
This commit is contained in:
jaseg
parent
695b58ef9f
commit
0fda5c8614
8 changed files with 40221 additions and 139384 deletions
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101522
micro-ihsm-hw/fp-info-cache
101522
micro-ihsm-hw/fp-info-cache
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}
|
||||
],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 2
|
||||
|
|
@ -85,9 +91,11 @@
|
|||
"lib_footprint_mismatch": "warning",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"mirrored_text_on_front_layer": "warning",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"nonmirrored_text_on_back_layer": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "warning",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
|
|
@ -118,7 +126,7 @@
|
|||
"min_connection": 0.0,
|
||||
"min_copper_edge_clearance": 0.5,
|
||||
"min_groove_width": 0.0,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_clearance": 0.2,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.2,
|
||||
"min_microvia_drill": 0.1,
|
||||
|
|
@ -126,7 +134,7 @@
|
|||
"min_silk_clearance": 0.0,
|
||||
"min_text_height": 0.8,
|
||||
"min_text_thickness": 0.08,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_through_hole_diameter": 0.2,
|
||||
"min_track_width": 0.0,
|
||||
"min_via_annular_width": 0.1,
|
||||
"min_via_diameter": 0.5,
|
||||
|
|
@ -177,7 +185,20 @@
|
|||
"td_width_to_size_filter_ratio": 0.9
|
||||
}
|
||||
],
|
||||
"track_widths": [],
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.1,
|
||||
0.12,
|
||||
0.15,
|
||||
0.18,
|
||||
0.2,
|
||||
0.25,
|
||||
0.3,
|
||||
0.4,
|
||||
0.5,
|
||||
0.8,
|
||||
1.0
|
||||
],
|
||||
"tuning_pattern_settings": {
|
||||
"diff_pair_defaults": {
|
||||
"corner_radius_percentage": 80,
|
||||
|
|
@ -204,7 +225,12 @@
|
|||
"spacing": 0.6
|
||||
}
|
||||
},
|
||||
"via_dimensions": [],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false
|
||||
},
|
||||
"ipc2581": {
|
||||
|
|
@ -452,13 +478,13 @@
|
|||
},
|
||||
"meta": {
|
||||
"filename": "micro-ihsm-hw.kicad_pro",
|
||||
"version": 1
|
||||
"version": 3
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.2,
|
||||
"clearance": 0.1,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
|
|
@ -467,12 +493,24 @@
|
|||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"priority": -1,
|
||||
"priority": 2147483647,
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.2,
|
||||
"via_diameter": 0.6,
|
||||
"track_width": 0.1,
|
||||
"via_diameter": 0.4,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6
|
||||
},
|
||||
{
|
||||
"clearance": 0.2032,
|
||||
"diff_pair_gap": 0.2032,
|
||||
"diff_pair_width": 0.1582,
|
||||
"name": "diffpair",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"priority": 0,
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.1582,
|
||||
"via_diameter": 0.3,
|
||||
"via_drill": 0.2
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
|
|
@ -534,6 +572,12 @@
|
|||
"/PULSE_A-": [
|
||||
"diffpair"
|
||||
],
|
||||
"/PULSE_B+": [
|
||||
"diffpair"
|
||||
],
|
||||
"/PULSE_B-": [
|
||||
"diffpair"
|
||||
],
|
||||
"/PULSE_E+": [
|
||||
"diffpair"
|
||||
],
|
||||
|
|
@ -552,6 +596,12 @@
|
|||
"/SAMPLE_A-": [
|
||||
"diffpair"
|
||||
],
|
||||
"/SAMPLE_B+": [
|
||||
"diffpair"
|
||||
],
|
||||
"/SAMPLE_B-": [
|
||||
"diffpair"
|
||||
],
|
||||
"/SAMPLE_E+": [
|
||||
"diffpair"
|
||||
],
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
Loading…
Add table
Add a link
Reference in a new issue