From 8cfb538d795f2a3682923f3981bb7bb5c10c1c94 Mon Sep 17 00:00:00 2001
From: jaseg <git-bigdata-wsl-arch@jaseg.de>
Date: Wed, 23 Jun 2021 14:04:10 +0200
Subject: [PATCH] SPI regfile tests run

---
 Artix-7-HDMI-processing.xpr |   2 +-
 spi_core_tb_behav.wcfg      | 128 -------------------------------
 spi_regfile_tb_behav.wcfg   | 114 ++++++++++++----------------
 src/spi_core.v              |  89 ----------------------
 src/spi_regfile.v           |  96 ++++++++++++------------
 test_bench/spi_core_tb.v    | 146 ------------------------------------
 test_bench/spi_regfile_tb.v |  34 ++++-----
 7 files changed, 113 insertions(+), 496 deletions(-)
 delete mode 100644 spi_core_tb_behav.wcfg
 delete mode 100644 src/spi_core.v
 delete mode 100644 test_bench/spi_core_tb.v

diff --git a/Artix-7-HDMI-processing.xpr b/Artix-7-HDMI-processing.xpr
index 492b92a..bfea4ef 100644
--- a/Artix-7-HDMI-processing.xpr
+++ b/Artix-7-HDMI-processing.xpr
@@ -42,7 +42,7 @@
     <Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
     <Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
     <Option Name="EnableBDX" Val="FALSE"/>
-    <Option Name="WTXSimLaunchSim" Val="458"/>
+    <Option Name="WTXSimLaunchSim" Val="481"/>
     <Option Name="WTModelSimLaunchSim" Val="0"/>
     <Option Name="WTQuestaLaunchSim" Val="0"/>
     <Option Name="WTIesLaunchSim" Val="0"/>
diff --git a/spi_core_tb_behav.wcfg b/spi_core_tb_behav.wcfg
deleted file mode 100644
index 96cc0a0..0000000
--- a/spi_core_tb_behav.wcfg
+++ /dev/null
@@ -1,128 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<wave_config>
-   <wave_state>
-   </wave_state>
-   <db_ref_list>
-      <db_ref path="spi_core_tb_behav.wdb" id="1">
-         <top_modules>
-            <top_module name="glbl" />
-            <top_module name="spi_core_tb" />
-         </top_modules>
-      </db_ref>
-   </db_ref_list>
-   <zoom_setting>
-      <ZoomStartTime time="2358333fs"></ZoomStartTime>
-      <ZoomEndTime time="16508334fs"></ZoomEndTime>
-      <Cursor1Time time="14150000fs"></Cursor1Time>
-   </zoom_setting>
-   <column_width_setting>
-      <NameColumnWidth column_width="175"></NameColumnWidth>
-      <ValueColumnWidth column_width="146"></ValueColumnWidth>
-   </column_width_setting>
-   <WVObjectSize size="24" />
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/clk" type="logic">
-      <obj_property name="ElementShortName">clk</obj_property>
-      <obj_property name="ObjectShortName">clk</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/rst" type="logic">
-      <obj_property name="ElementShortName">rst</obj_property>
-      <obj_property name="ObjectShortName">rst</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/ncs" type="logic">
-      <obj_property name="ElementShortName">ncs</obj_property>
-      <obj_property name="ObjectShortName">ncs</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/sck" type="logic">
-      <obj_property name="ElementShortName">sck</obj_property>
-      <obj_property name="ObjectShortName">sck</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/sdi" type="logic">
-      <obj_property name="ElementShortName">sdi</obj_property>
-      <obj_property name="ObjectShortName">sdi</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/sdo" type="logic">
-      <obj_property name="ElementShortName">sdo</obj_property>
-      <obj_property name="ObjectShortName">sdo</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/cs_rising" type="logic">
-      <obj_property name="ElementShortName">cs_rising</obj_property>
-      <obj_property name="ObjectShortName">cs_rising</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/cs_falling" type="logic">
-      <obj_property name="ElementShortName">cs_falling</obj_property>
-      <obj_property name="ObjectShortName">cs_falling</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/data_out" type="array">
-      <obj_property name="ElementShortName">data_out[15:0]</obj_property>
-      <obj_property name="ObjectShortName">data_out[15:0]</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/data_out_valid" type="logic">
-      <obj_property name="ElementShortName">data_out_valid</obj_property>
-      <obj_property name="ObjectShortName">data_out_valid</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/data_in" type="array">
-      <obj_property name="ElementShortName">data_in[15:0]</obj_property>
-      <obj_property name="ObjectShortName">data_in[15:0]</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/data_in_valid" type="logic">
-      <obj_property name="ElementShortName">data_in_valid</obj_property>
-      <obj_property name="ObjectShortName">data_in_valid</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/sim_txbuf" type="array">
-      <obj_property name="ElementShortName">sim_txbuf[15:0]</obj_property>
-      <obj_property name="ObjectShortName">sim_txbuf[15:0]</obj_property>
-      <obj_property name="CustomSignalColor">#FAAFBE</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/last_cs" type="logic">
-      <obj_property name="ElementShortName">last_cs</obj_property>
-      <obj_property name="ObjectShortName">last_cs</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/last_sck" type="array">
-      <obj_property name="ElementShortName">last_sck[1:0]</obj_property>
-      <obj_property name="ObjectShortName">last_sck[1:0]</obj_property>
-      <obj_property name="Radix">BINARYRADIX</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/rx_buf" type="array">
-      <obj_property name="ElementShortName">rx_buf[15:0]</obj_property>
-      <obj_property name="ObjectShortName">rx_buf[15:0]</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/tx_buf" type="array">
-      <obj_property name="ElementShortName">tx_buf[15:0]</obj_property>
-      <obj_property name="ObjectShortName">tx_buf[15:0]</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/tx_buf_next" type="array">
-      <obj_property name="ElementShortName">tx_buf_next[15:0]</obj_property>
-      <obj_property name="ObjectShortName">tx_buf_next[15:0]</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/sck_rising" type="logic">
-      <obj_property name="ElementShortName">sck_rising</obj_property>
-      <obj_property name="ObjectShortName">sck_rising</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/spi_core_dut/sck_falling" type="logic">
-      <obj_property name="ElementShortName">sck_falling</obj_property>
-      <obj_property name="ObjectShortName">sck_falling</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/i" type="array">
-      <obj_property name="ElementShortName">i[31:0]</obj_property>
-      <obj_property name="ObjectShortName">i[31:0]</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/sim_rxdata" type="array">
-      <obj_property name="ElementShortName">sim_rxdata[1:4][15:0]</obj_property>
-      <obj_property name="ObjectShortName">sim_rxdata[1:4][15:0]</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/sim_txdata" type="array">
-      <obj_property name="ElementShortName">sim_txdata[1:4][15:0]</obj_property>
-      <obj_property name="ObjectShortName">sim_txdata[1:4][15:0]</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_core_tb/testcase" type="array">
-      <obj_property name="ElementShortName">testcase[31:0]</obj_property>
-      <obj_property name="ObjectShortName">testcase[31:0]</obj_property>
-   </wvobject>
-</wave_config>
diff --git a/spi_regfile_tb_behav.wcfg b/spi_regfile_tb_behav.wcfg
index 4735b15..ac56f08 100644
--- a/spi_regfile_tb_behav.wcfg
+++ b/spi_regfile_tb_behav.wcfg
@@ -11,42 +11,56 @@
       </db_ref>
    </db_ref_list>
    <zoom_setting>
-      <ZoomStartTime time="731666fs"></ZoomStartTime>
-      <ZoomEndTime time="5121667fs"></ZoomEndTime>
-      <Cursor1Time time="4390000fs"></Cursor1Time>
+      <ZoomStartTime time="0fs"></ZoomStartTime>
+      <ZoomEndTime time="3970000fs"></ZoomEndTime>
+      <Cursor1Time time="760019fs"></Cursor1Time>
    </zoom_setting>
    <column_width_setting>
       <NameColumnWidth column_width="175"></NameColumnWidth>
       <ValueColumnWidth column_width="154"></ValueColumnWidth>
    </column_width_setting>
-   <WVObjectSize size="34" />
+   <WVObjectSize size="29" />
    <wvobject fp_name="/spi_regfile_tb/testcase" type="array">
       <obj_property name="ElementShortName">testcase[31:0]</obj_property>
       <obj_property name="ObjectShortName">testcase[31:0]</obj_property>
+      <obj_property name="CustomSignalColor">#DCDCDC</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
    <wvobject fp_name="/spi_regfile_tb/clk" type="logic">
       <obj_property name="ElementShortName">clk</obj_property>
       <obj_property name="ObjectShortName">clk</obj_property>
+      <obj_property name="CustomSignalColor">#DCDCDC</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
    <wvobject fp_name="/spi_regfile_tb/rst" type="logic">
       <obj_property name="ElementShortName">rst</obj_property>
       <obj_property name="ObjectShortName">rst</obj_property>
+      <obj_property name="CustomSignalColor">#DCDCDC</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
    <wvobject fp_name="/spi_regfile_tb/sck" type="logic">
       <obj_property name="ElementShortName">sck</obj_property>
       <obj_property name="ObjectShortName">sck</obj_property>
+      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
    <wvobject fp_name="/spi_regfile_tb/sdi" type="logic">
       <obj_property name="ElementShortName">sdi</obj_property>
       <obj_property name="ObjectShortName">sdi</obj_property>
+      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
    <wvobject fp_name="/spi_regfile_tb/sdo" type="logic">
       <obj_property name="ElementShortName">sdo</obj_property>
       <obj_property name="ObjectShortName">sdo</obj_property>
+      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
    <wvobject fp_name="/spi_regfile_tb/ncs" type="logic">
       <obj_property name="ElementShortName">ncs</obj_property>
       <obj_property name="ObjectShortName">ncs</obj_property>
+      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
    <wvobject fp_name="/spi_regfile_tb/spi_data_in" type="array">
       <obj_property name="ElementShortName">spi_data_in[15:0]</obj_property>
@@ -64,14 +78,14 @@
       <obj_property name="ElementShortName">spi_cmd_word[15:0]</obj_property>
       <obj_property name="ObjectShortName">spi_cmd_word[15:0]</obj_property>
    </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_cmd_begin" type="logic">
-      <obj_property name="ElementShortName">spi_cmd_begin</obj_property>
-      <obj_property name="ObjectShortName">spi_cmd_begin</obj_property>
-   </wvobject>
    <wvobject fp_name="/spi_regfile_tb/spi_cmd_active" type="logic">
       <obj_property name="ElementShortName">spi_cmd_active</obj_property>
       <obj_property name="ObjectShortName">spi_cmd_active</obj_property>
    </wvobject>
+   <wvobject fp_name="/spi_regfile_tb/spi_cmd_begin" type="logic">
+      <obj_property name="ElementShortName">spi_cmd_begin</obj_property>
+      <obj_property name="ObjectShortName">spi_cmd_begin</obj_property>
+   </wvobject>
    <wvobject fp_name="/spi_regfile_tb/spi_cmd_step" type="logic">
       <obj_property name="ElementShortName">spi_cmd_step</obj_property>
       <obj_property name="ObjectShortName">spi_cmd_step</obj_property>
@@ -112,69 +126,39 @@
       <obj_property name="ElementShortName">WORDSIZE[31:0]</obj_property>
       <obj_property name="ObjectShortName">WORDSIZE[31:0]</obj_property>
    </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_dut/data_out" type="array">
-      <obj_property name="ElementShortName">data_out[15:0]</obj_property>
-      <obj_property name="ObjectShortName">data_out[15:0]</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_dut/data_out_valid" type="logic">
-      <obj_property name="ElementShortName">data_out_valid</obj_property>
-      <obj_property name="ObjectShortName">data_out_valid</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_dut/data_in" type="array">
-      <obj_property name="ElementShortName">data_in[15:0]</obj_property>
-      <obj_property name="ObjectShortName">data_in[15:0]</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_dut/data_in_valid" type="logic">
-      <obj_property name="ElementShortName">data_in_valid</obj_property>
-      <obj_property name="ObjectShortName">data_in_valid</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_dut/sck_rising" type="logic">
-      <obj_property name="ElementShortName">sck_rising</obj_property>
-      <obj_property name="ObjectShortName">sck_rising</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_dut/sck_falling" type="logic">
-      <obj_property name="ElementShortName">sck_falling</obj_property>
-      <obj_property name="ObjectShortName">sck_falling</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_dut/tx_buf" type="array">
-      <obj_property name="ElementShortName">tx_buf[15:0]</obj_property>
-      <obj_property name="ObjectShortName">tx_buf[15:0]</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_dut/tx_buf_next" type="array">
-      <obj_property name="ElementShortName">tx_buf_next[15:0]</obj_property>
-      <obj_property name="ObjectShortName">tx_buf_next[15:0]</obj_property>
-      <obj_property name="CustomSignalColor">#FFFF00</obj_property>
-      <obj_property name="UseCustomSignalColor">true</obj_property>
-   </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/is_spi_cmd_word" type="logic">
-      <obj_property name="ElementShortName">is_spi_cmd_word</obj_property>
-      <obj_property name="ObjectShortName">is_spi_cmd_word</obj_property>
+   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/txbuf" type="array">
+      <obj_property name="ElementShortName">txbuf[14:0]</obj_property>
+      <obj_property name="ObjectShortName">txbuf[14:0]</obj_property>
       <obj_property name="CustomSignalColor">#FAAFBE</obj_property>
       <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_cs_rising" type="logic">
-      <obj_property name="ElementShortName">spi_core_cs_rising</obj_property>
-      <obj_property name="ObjectShortName">spi_core_cs_rising</obj_property>
+   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/rxbuf" type="array">
+      <obj_property name="ElementShortName">rxbuf[15:0]</obj_property>
+      <obj_property name="ObjectShortName">rxbuf[15:0]</obj_property>
       <obj_property name="CustomSignalColor">#FAAFBE</obj_property>
       <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
-   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/spi_core_cs_falling" type="logic">
-      <obj_property name="ElementShortName">spi_core_cs_falling</obj_property>
-      <obj_property name="ObjectShortName">spi_core_cs_falling</obj_property>
+   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/is_cmd_word" type="logic">
+      <obj_property name="ElementShortName">is_cmd_word</obj_property>
+      <obj_property name="ObjectShortName">is_cmd_word</obj_property>
+      <obj_property name="CustomSignalColor">#FAAFBE</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
+   </wvobject>
+   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/last_ncs" type="logic">
+      <obj_property name="ElementShortName">last_ncs</obj_property>
+      <obj_property name="ObjectShortName">last_ncs</obj_property>
+      <obj_property name="CustomSignalColor">#FAAFBE</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
+   </wvobject>
+   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/last_sck" type="logic">
+      <obj_property name="ElementShortName">last_sck</obj_property>
+      <obj_property name="ObjectShortName">last_sck</obj_property>
+      <obj_property name="CustomSignalColor">#FAAFBE</obj_property>
+      <obj_property name="UseCustomSignalColor">true</obj_property>
+   </wvobject>
+   <wvobject fp_name="/spi_regfile_tb/spi_regfile_dut/load_data" type="logic">
+      <obj_property name="ElementShortName">load_data</obj_property>
+      <obj_property name="ObjectShortName">load_data</obj_property>
       <obj_property name="CustomSignalColor">#FAAFBE</obj_property>
       <obj_property name="UseCustomSignalColor">true</obj_property>
    </wvobject>
diff --git a/src/spi_core.v b/src/spi_core.v
deleted file mode 100644
index 41b66e0..0000000
--- a/src/spi_core.v
+++ /dev/null
@@ -1,89 +0,0 @@
-`timescale 1ns / 1ps
-	
-module spi_core(
-	input clk, rst,
-	
-	input sck, sdi, ncs,
-	output reg sdo,
-	
-	output reg cs_rising,
-	output reg cs_falling,
-	output reg [WORDSIZE-1:0] data_out,
-	output reg data_out_valid,
-	input [WORDSIZE-1:0] data_in,
-	input data_in_valid
-);
-
-parameter WORDSIZE = 16;
-parameter SPI_CPOL = 0;
-parameter SPI_CPHA = 0;
-
-/* Receiver */
-
-reg last_cs;
-reg [1:0] last_sck;
-reg [WORDSIZE-1:0] rx_buf;
-reg [WORDSIZE-1:0] tx_buf;
-reg [WORDSIZE-1:0] tx_buf_next;
-
-wire sck_rising = !last_sck[1] && last_sck[0];
-wire sck_falling = last_sck[1] && !last_sck[0];
-
-always @(posedge clk) begin
-	last_cs <= ncs;
-	last_sck = {last_sck[0], sck};
-	data_out_valid <= 0;
-
-	if (rst) begin
-		rx_buf[WORDSIZE-1:1] <= 0;
-		rx_buf[0] <= 1;
-		tx_buf <= 0;
-		tx_buf_next <= 0;
-		sdo <= 0;
-		data_out <= 0;
-		data_out_valid <= 0;
-		
-	end else begin
-		if (last_cs && !ncs) begin /* cs falling, device asserted */
-			cs_falling <= 1;
-			cs_rising <= 0;
-			sdo <= tx_buf_next[WORDSIZE-1];
-			tx_buf <= {tx_buf_next[WORDSIZE-2:0], 1'b0};
-			tx_buf_next <= 0;
-			
-		end else if (!last_cs && ncs) begin /* cs rising, device de-asserted */
-			cs_falling <= 0;
-			cs_rising <= 1;
-			
-		end else begin /* cs unchanged */
-			cs_falling <= 0;
-			cs_rising <= 0;
-		end
-		
-		if(!ncs) begin
-			if (((SPI_CPOL == SPI_CPHA) && sck_rising) || ((SPI_CPOL != SPI_CPHA) && sck_falling)) begin /* sampling edge */
-				if (rx_buf[WORDSIZE-1]) begin
-					data_out <= {rx_buf[WORDSIZE-2:0], sdi};
-					data_out_valid <= 1;
-					rx_buf[WORDSIZE-1:1] <= 0;
-					rx_buf[0] <= 1;
-					tx_buf <= tx_buf_next;
-					tx_buf_next <= 0;
-					
-				end else begin
-					rx_buf <= {rx_buf[WORDSIZE-2:0], sdi};
-				end
-				
-			end else if (((SPI_CPOL == SPI_CPHA) && sck_falling) || ((SPI_CPOL != SPI_CPHA) && sck_rising)) begin /* driving edge */
-				sdo <= tx_buf[WORDSIZE-1];
-				tx_buf <= {tx_buf[WORDSIZE-2:0], 1'b0};
-			end
-		end
-		
-		if (data_in_valid) begin
-			tx_buf_next <= data_in;
-		end
-	end
-end
-
-endmodule
diff --git a/src/spi_regfile.v b/src/spi_regfile.v
index f211dac..7c44a53 100644
--- a/src/spi_regfile.v
+++ b/src/spi_regfile.v
@@ -4,7 +4,7 @@ module spi_regfile(
 	input clk, rst,
 	
 	input sck, sdi, ncs,
-	output sdo,
+	output reg sdo,
 	
 	input [15:0] spi_data_in,
 	output reg [15:0] spi_data_out,
@@ -17,69 +17,71 @@ module spi_regfile(
 	output reg [19:0] spi_cmd_idx
 );
 
-wire spi_core_cs_rising, spi_core_cs_falling;
-reg [15:0] spi_core_data_in;
-reg spi_core_data_in_valid;
-wire [15:0] spi_core_data_out;
-wire spi_core_data_out_valid;
 
-reg is_spi_cmd_word;
+reg [14:0] txbuf;
+reg [15:0] rxbuf;
+reg is_cmd_word;
+reg last_ncs;
+reg last_sck;
+reg load_data;
 
 always @(posedge clk) begin
-	spi_core_data_in_valid <= 0;
 	spi_cmd_begin <= 0;
 	spi_cmd_step <= 0;
-	spi_core_data_in <= spi_status_word;
+	load_data <= 0;
+	last_ncs <= ncs;
+	last_sck <= sck;
 
 	if (rst) begin
-		is_spi_cmd_word <= 1;
+		is_cmd_word <= 1;
 		spi_cmd_active <= 0;
 		spi_cmd_idx <= 0;
 		
 	end else begin
-		
-		if (spi_core_cs_rising) begin
-			is_spi_cmd_word <= 1;
-			spi_cmd_active <= 0;
+		if (last_ncs && !ncs) begin
+			txbuf <= spi_status_word[14:0];
+			sdo <= spi_status_word[15];
+			rxbuf <= 15'h0001;
 		end
 		
-		if (ncs) begin
-			/* constantly refresh status word */
-			spi_core_data_in_valid <= 1;
-		end
-		
-		if (spi_core_data_out_valid) begin
-			spi_core_data_in <= spi_data_in;
-			spi_core_data_in_valid <= 1;
-			
-			if (is_spi_cmd_word) begin
-				spi_cmd_word <= spi_core_data_out;
-				spi_cmd_idx <= 0;
-				spi_cmd_active <= 1;
-				spi_cmd_begin <= 1;
-				is_spi_cmd_word <= 0;
+		if (!ncs) begin
+			if (!last_sck && sck) begin /* sampling edge */
+				if (!rxbuf[15]) begin
+					rxbuf <= {rxbuf[14:0], sdi};
+					
+				end else begin
+					rxbuf <= 15'h0001;
+					load_data <= 1;
+					
+					if (is_cmd_word) begin
+						spi_cmd_word <= {rxbuf[14:0], sdi};
+						is_cmd_word <= 0;
+						spi_cmd_active <= 1;
+						spi_cmd_begin <= 1;
+						spi_cmd_idx <= 0;
+						
+					end else begin
+						spi_data_out <= {rxbuf[14:0], sdi};
+						spi_cmd_idx <= spi_cmd_idx+1;
+						spi_cmd_step <= 1;
+					end
+				end
 				
-			end else begin
-				 spi_cmd_idx <= spi_cmd_idx + 1;
-				 spi_cmd_step <= 1;
-				 spi_data_out <= spi_core_data_out;
+			end else if (last_sck && !sck) begin /* driving edge */
+				if (load_data) begin
+					sdo <= spi_data_in[15];
+					txbuf <= spi_data_in[14:0];
+				
+				end else begin
+					sdo <= txbuf[14];
+					txbuf <=  {txbuf[13:0], 1'b0};
+				end
 			end
+			
+		end else begin
+			spi_cmd_active <= 0;
 		end
 	end
 end
 
-spi_core #(.WORDSIZE(16)) spi_core_dut (
-	.clk(clk), .rst(rst),
-	
-	.sck(sck), .sdi(sdi), .sdo(sdo), .ncs(ncs),
-	
-	.cs_rising(spi_core_cs_rising),
-	.cs_falling(spi_core_cs_falling),
-	
-	.data_out(spi_core_data_out),
-	.data_out_valid(spi_core_data_out_valid),
-	.data_in(spi_core_data_in),
-	.data_in_valid(spi_core_data_in_valid)
-);
-
 endmodule
diff --git a/test_bench/spi_core_tb.v b/test_bench/spi_core_tb.v
deleted file mode 100644
index 4a2e6a2..0000000
--- a/test_bench/spi_core_tb.v
+++ /dev/null
@@ -1,146 +0,0 @@
-`timescale 1ns / 1ps
-
-module spi_core_tb();
-
-localparam period = 10;
-parameter WORDSIZE = 16;
-reg clk, rst;
-
-reg sck, sdi, ncs;
-wire sdo;
-
-wire cs_rising, cs_falling;
-
-wire [WORDSIZE-1:0] data_out;
-wire data_out_valid;
-
-reg [WORDSIZE-1:0] data_in;
-reg data_in_valid;
-
-initial begin
-	clk = 0;
-	/* rst set below */
-	sck = 0;
-	sdi = 0;
-	ncs = 1;
-	data_in = 0;
-	data_in_valid = 0;
-	forever #period clk = ~clk;
-end
-
-integer i;
-integer j;
-integer k;
-integer testcase;
-reg [WORDSIZE-1:0] sim_rxdata [1:4];
-reg [WORDSIZE-1:0] sim_txdata [1:4];
-reg [WORDSIZE-1:0] sim_txbuf;
-initial begin
-	sim_rxdata[1] = 16'h523a;
-	sim_rxdata[2] = 16'hbeef;
-	sim_rxdata[3] = 16'h7721;
-	sim_rxdata[4] = 16'h0108;
-	
-	sim_txdata[1] = 16'h1234;
-	sim_txdata[2] = 16'h5678;
-	sim_txdata[3] = 16'h9abc;
-	sim_txdata[4] = 16'hdef9;
-	
-	for (j=1; j<=4; j=j+1) begin
-		$display("TC-SIMPLE-%d: rx/tx %d word", j, j);
-		testcase = j;
-	
-		rst = 1;
-		repeat(2) @(posedge clk);
-		rst = 0;
-		@(posedge clk);
-		
-		data_in = sim_txdata[1];
-		data_in_valid = 1;
-		@(posedge clk);
-		
-		data_in_valid = 0;
-		ncs = 0;
-		@(posedge clk);
-		if (cs_rising || !cs_falling || data_out_valid) $finish;
-		
-		for (k=0; k<j; k=k+1) begin
-			sim_txbuf = 0;
-			data_in = 16'h0000;
-			data_in_valid = 0;
-			
-			for (i=0; i<WORDSIZE; i=i+1) begin
-				sdi = sim_rxdata[k+1][WORDSIZE-1-i];
-				sck = 0;
-				
-				@(posedge clk);
-				if (cs_rising || cs_falling || (i < WORDSIZE-1 && data_out_valid)) $finish;
-				@(posedge clk);
-				if (cs_rising || cs_falling || data_out_valid) $finish;
-				
-				sck = 1;
-				sim_txbuf[WORDSIZE-1-i] = sdo;
-				
-				if (i == WORDSIZE-1) begin
-					data_in = sim_txdata[k+2];
-					data_in_valid = 1;
-				end
-				
-				@(posedge clk);
-				data_in_valid = 0;
-				if (cs_rising || cs_falling || (i < WORDSIZE-1 && data_out_valid)) $finish;
-				@(posedge clk);
-				if (cs_rising || cs_falling || (i < WORDSIZE-1 && data_out_valid)) $finish;
-			end
-			
-			if (!data_out_valid) $finish;
-			if (data_out != sim_rxdata[k+1]) $finish;
-			if (!sim_txbuf == sim_txdata[k+1]) $finish;
-		end
-		
-		sck = 0;
-		@(posedge clk);
-		ncs = 1;
-		@(posedge clk);
-		if (!cs_rising || cs_falling || data_out_valid) $finish;
-		
-		repeat(10) @(posedge clk);
-	end
-
-	$finish;
-end
-
-reg cs_rising_last, cs_falling_last;
-always @(posedge clk) begin
-	/* Only one signal can be active at the same time */
-	if (cs_rising && cs_falling) $finish;
-	/* Both signals must be one-cycle pulses */
-	if (cs_rising == 1 && cs_rising_last == 1) $finish;
-	if (cs_falling == 1 && cs_falling_last == 1) $finish;
-	cs_rising_last <= cs_rising;
-	cs_falling_last <= cs_falling;
-end
-
-reg sck_last, sdo_last;
-always @(posedge clk) begin
-	//if (sck_last == sck && sdo_last != sdo) $finish; /* SDO can only change on SCK edges */
-	sck_last <= sck;
-	sdo_last <= sdo;
-end
-
-
-spi_core #(.WORDSIZE(WORDSIZE)) spi_core_dut (
-	.clk(clk), .rst(rst),
-	
-	.sck(sck), .sdi(sdi), .sdo(sdo), .ncs(ncs),
-	
-	.cs_rising(cs_rising),
-	.cs_falling(cs_falling),
-	
-	.data_out(data_out),
-	.data_out_valid(data_out_valid),
-	.data_in(data_in),
-	.data_in_valid(data_in_valid)
-);
-
-endmodule
\ No newline at end of file
diff --git a/test_bench/spi_regfile_tb.v b/test_bench/spi_regfile_tb.v
index 9831475..dc17923 100644
--- a/test_bench/spi_regfile_tb.v
+++ b/test_bench/spi_regfile_tb.v
@@ -57,53 +57,47 @@ initial begin
 		
 		ncs = 0;
 		@(posedge clk);
-		@(posedge clk);
 		if (spi_cmd_begin) $finish;
 		if (spi_cmd_active) $finish;
 		if (spi_cmd_step) $finish;
 		
-		for (k=0; k<j; k=k+1) begin
+		for (k=1; k<=j; k=k+1) begin
 			sim_txbuf = 0;
 			
-			for (i=0; i<WORDSIZE; i=i+1) begin
-				sdi = sim_rxdata[k+1][WORDSIZE-1-i];
+			for (i=1; i<=WORDSIZE; i=i+1) begin
+				sdi = sim_rxdata[k][WORDSIZE-i];
 				sck = 0;
-				if (spi_cmd_step) $finish;
 				
-				@(posedge clk);
 				@(posedge clk);
 				
 				sck = 1;
-				sim_txbuf[WORDSIZE-1-i] = sdo;
+				sim_txbuf[WORDSIZE-i] = sdo;
 				
-				if (i == WORDSIZE-1) begin
-					spi_data_in = sim_txdata[k+2];
+				if (i == WORDSIZE) begin
+					spi_data_in = sim_txdata[k+1];
 				end
 				
 				if (spi_cmd_step) $finish;
 				
 				@(posedge clk);
-				@(posedge clk);
 			end
 			
-			@(posedge clk);
-			
 			if (!spi_cmd_active) $finish;
-			if (k == 0 && !spi_cmd_begin) $finish;
-			if (k > 0 && spi_cmd_begin) $finish;
-			if (k == 0 && spi_cmd_step) $finish;
-			if (k > 0 && !spi_cmd_step) $finish;
+			if (k == 1 && !spi_cmd_begin) $finish;
+			if (k > 1 && spi_cmd_begin) $finish;
+			if (k == 1 && spi_cmd_step) $finish;
+			if (k > 1 && !spi_cmd_step) $finish;
 			if (spi_cmd_word != sim_rxdata[1]) $finish;
-			if (k > 0 && spi_data_out != sim_rxdata[k+1]) $finish;
-			if (k == 0 && sim_txbuf != 16'h3141) $finish;
-			if (k > 0 && sim_txbuf != sim_txdata[k]) $finish;
+			if (k > 1 && spi_data_out != sim_rxdata[k]) $finish;
+			if (k == 1 && sim_txbuf != 16'h3141) $finish;
+			if (k > 1 && sim_txbuf != sim_txdata[k]) $finish;
+			if (spi_cmd_idx != k-1) $finish;
 		end
 		
 		sck = 0;
 		@(posedge clk);
 		ncs = 1;
 		@(posedge clk);
-		@(posedge clk);
 		
 		if (spi_cmd_active) $finish;
 		if (spi_cmd_step) $finish;