From ac71191a66c6a72fe6c97fbe6ca1bd51e6bfa71b Mon Sep 17 00:00:00 2001 From: jaseg Date: Sat, 17 Jan 2026 17:21:39 +0100 Subject: [PATCH] fix undefined references --- chapter-nice-coils/chapter.tex | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/chapter-nice-coils/chapter.tex b/chapter-nice-coils/chapter.tex index 33ebcdc..a2d61d1 100644 --- a/chapter-nice-coils/chapter.tex +++ b/chapter-nice-coils/chapter.tex @@ -277,11 +277,11 @@ voltage differential. The connecting order of turns was optimized at the assembly level by stacking coils in a particular way~\cite{flemingPrinciplesElectricWave1910} and at the component level by winding coils in a particular way to minimize the voltage differential between adjacent turns---a technique that is still used to this -day~\cite{lopeFirstSelfResonant2021}. The main winding optimization in the first category concerns winding the +day~\cite{lopeFirstSelfresonantFrequency2021}. The main winding optimization in the first category concerns winding the turns of a cylindrical multilayer inductor not layer by layer, but instead layering them diagonally, effectively connecting adjacent turns in a diagonal zigzag pattern. Then as now, wound inductors applying this technique were not feasible to manufacture reliably by machine, but the technique can be closely replicated in PCB inductors as shown in -\textcite{leePrintedSpiralWinding2011a}. The main limiting factors in a PCB implementation are the requirement for a +\textcite{leePrintedSpiralWinding2011}. The main limiting factors in a PCB implementation are the requirement for a large number of vias inside the inductor's turns limiting the achievable turn count\footnote{In PCBs, as opposed to integrated circuits (ICs), vias limit the achievable turn count when they need to be placed in-line inside the turns as opposed to on the inside or outside because a PCB's minimum trace/space widths are usually much smaller than the @@ -379,7 +379,7 @@ two core observations: \end{description} Setting the inversion count to $k=1$ in our proposed scheme yields the conventional two-layer counterwound -scheme~\cite{lopeFirstSelfResonant2021,sproHighVoltageInsulationDesign2021,leePrintedSpiralWinding2011a}. +scheme~\cite{lopeFirstSelfresonantFrequency2021,sproHighVoltageInsulationDesign2021,leePrintedSpiralWinding2011}. \begin{figure} \begin{center}